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VIA EPIA-M920 User Manual 

26

 

2.2.14.

 

SPI Pin Header 

The VIA EPIA-M920 has one 8-pin SPI pin header. The SPI pin header is used to connect to the SPI BIOS 
programming fixture. The pin header is labeled as “SPI1”. The pinouts of the SPI pin header are shown 
below. 

 

1

SPI1

 

Figure 28:  SPI pin header diagram 

 
 

Pin 

Signal 

Pin 

Signal 

1 

SPIVCC 

2 

GND 

3 

MSPISA 

4 

MSPICLK 

5 

MSPIDI 

6 

MSPIDO 

7 

— 

8 

-PCIRST 

Table 25:  SPI pin header pinouts 

Summary of Contents for EPIA-M920

Page 1: ...2 10 07012020 153900 USER MANUAL VIA EPIA M920 Highly integrated low power platform with rich feature set and multimedia capabilities ...

Page 2: ... such change VIA Technologies Inc reserves the right the make changes to the products described in this manual at any time without prior notice Regulatory Compliance FCC A Radio Frequency Interference Statement This equipment has been tested and found to comply with the limits for a class A digital device pursuant to part 15 of the FCC rules These limits are designed to provide reasonable protecti...

Page 3: ... power cord where people will step on it Always unplug the power cord before inserting any add on card or module If any of the following situations arise get the equipment checked by authorized service personnel The power cord or plug is damaged Liquid has entered into the equipment The equipment has been exposed to moisture The equipment is faulty or you cannot get it work according to User s Man...

Page 4: ...z VIA QuadCore E Series CPU with 2 HDMI VGA 2 LVDS 3 USB 3 0 6 USB 2 0 4 COM 2 Gigabit Ethernet 2 SATA PCIe x4 slot ATX power connector EPIA M920 16QE Mini ITX board with 1 6GHz VIA Eden X4 CPU with 2 HDMI VGA 2 LVDS 3 USB 3 0 6 USB 2 0 4 COM 2 Gigabit Ethernet 2 SATA PCIe x4 slot ATX power connector Optional Accessories Wireless Modules Part Number Description EMIO 1533 00A2 VNT9271 IEEE 802 11b ...

Page 5: ...l Resister Pin Header 17 2 2 6 Front Panel Pin Header 18 2 2 7 SMBus Pin Header 19 2 2 8 CPU and System Fan Connectors 20 2 2 9 SATA Connector 21 2 2 10 USB 2 0 Pin Header 22 2 2 11 COM Pin Header 23 2 2 12 PS 2 Keyboard and Mouse Pin Header 24 2 2 13 Front Audio Pin Header 25 2 2 14 SPI Pin Header 26 2 2 15 LPC Pin Header 27 2 2 16 S PDIF Connector 28 2 2 17 CMOS Battery Slot 28 2 2 18 USB 3 0 Co...

Page 6: ... 6 5 1 1 Serial Port 51 6 6 5 2 Serial Port 1 Configuration 51 6 6 5 2 1 Serial Port 51 6 6 5 2 2 Device Mode 51 6 6 6 F71869 H W Monitor 52 6 6 6 1 CPU Smart Fan Configuration 52 6 6 6 1 1 Smart Fan Support 52 6 6 6 2 System Smart Fan Configuration 52 6 6 6 2 1 Smart Fan Support 52 6 6 7 Clock Generator Configuration 53 6 6 7 1 CPU Spread Spectrum 53 6 6 7 2 PCIe Spread Spectrum 53 6 6 8 OnBoard ...

Page 7: ...aunch PXE OpROM policy 66 6 9 Security Settings 67 6 9 1 Security Settings 67 6 9 1 1 Administrator Password User Password 67 6 9 1 2 Password Check 67 6 10 Save Exit Options 68 6 10 1 Save Changes and Exit 68 6 10 2 Discard Changes and Exit 68 6 10 3 Save Changes and Reset 68 6 10 4 Discard Changes and Reset 68 6 10 5 Save Changes 68 6 10 6 Discard Changes 68 6 10 7 VIA Networking Bootagent 69 6 ...

Page 8: ...2 1 IDLE Status 78 B 2 2 S3 Status 78 B 2 3 MP3 Playing Windows Media Player 10 79 B 2 4 MP4 Playing Windows Media Player 10 79 B 2 5 Graphics Run 3D Marks 06 79 B 2 6 Functional Test Run BurnIn Test 6 0 80 B 2 7 GigaLAN Network Access x2 Ports 80 B 2 8 S5 Status 80 Appendix C Mating Connector Vendors List 81 ...

Page 9: ...diagram 24 Figure 27 Front audio pin header 25 Figure 28 SPI pin header diagram 26 Figure 29 LPC pin header diagram 27 Figure 30 S PDIF connector diagram 28 Figure 31 CMOS battery slot diagram 28 Figure 32 USB 3 0 connector diagram 29 Figure 33 Jumper settings example 30 Figure 34 Clear CMOS jumper diagram 31 Figure 35 SATA DOM power jumper diagram 32 Figure 36 COM1 and COM2 voltage jumper diagram...

Page 10: ...l screen 60 Figure 68 Illustration of HDAC Configuration screen 62 Figure 69 Illustration of SDIO_CR Configuration screen 63 Figure 70 Illustration of Others Configuration screen 64 Figure 71 Illustration of Boot Settings screen 65 Figure 72 Illustration of Security Settings screen 67 Figure 73 Illustration of Save Exit Options screen 68 Figure 74 Installing VIA EMIO 1533 module to the chassis 71 ...

Page 11: ... 17 Front panel pin header pinouts 18 Table 18 SMBus pin header pinouts 19 Table 19 CPU and System fan connectors pinouts 20 Table 20 SATA connectors pinouts 21 Table 21 USB 2 0 pin headers pinouts 22 Table 22 COM pin header pinouts 23 Table 23 PS 2 keyboard and mouse pin header pinouts 24 Table 24 Front audio pin header pinouts 25 Table 25 SPI pin header pinouts 26 Table 26 LPC pin header pinouts...

Page 12: ...ndows 7 and Windows Server 2008 R2 users only If encounter the issue such as the operating system recognizing the VIA Dual Core CPU as two processors instead of one processor with two cores Download and install the hotfix released by Microsoft to address this issue The downloadable hotfix is available at http support microsoft com kb 2502664 VIA QuadCore E Series and VIA Eden X4 processors are ide...

Page 13: ...controller for EPIA M920 20Q and EPIA M920 16QE Audio o VIA VT2021 High Definition Audio Codec Super I O o Fintek F71869E Expansion I O o 1 x PCIe x4 slot Onboard I O o 2 x SATA connectors o 2 x SATA DOM power selectors o 2 x USB 2 0 pin headers for 4 ports o 1 x USB 3 0 connector for 1 port o 1 x Dual channel 18 24 bit LVDS panel connector DVP VT1636 o 1 x Single channel 18 24 bit LVDS panel conn...

Page 14: ... 10 8 1 8 7 o Windows Embedded Standard 7 o Windows Embedded POSReady 7 o Linux Power Supply o ATX power connector System Monitoring Management o Wake on LAN Keyboard Power on Timer Power on System power management AC power failure recovery Watchdog Timer o Operating Temperature o 0 C 60 C Operating Humidity o 0 95 non condensing Form Factor o Mini ITX o 17cm x 17cm 6 7 x 6 7 Compliance o CE o FCC...

Page 15: ...n header SMBUS1 3 Digital I O pin headers DIO1 4 VDD power jumper J9 5 COM4 pin header COM4 6 Front panel pin header F_PANEL 7 LVDS1 power jumper J14 8 LVDS2 power jumper J15 9 Backlight control connector 2 INVERTER2 10 Backlight control connector 1 INVERTER1 11 LVDS panel connector 2 LVDS2 12 LVDS panel connector 1 LVDS1 13 DDR3 SODIMM voltage jumper J16 14 COM3 pin header COM3 15 LPC pin header ...

Page 16: ...r F_AUDIO1 27 S PDIF connector SPDIF1 28 SATA connector 1 SATA1 29 SATA connector 2 SATA2 30 SATA DOM power jumper J12 31 Clear CMOS jumper J10 32 CMOS battery slot BAT1 33 USB 3 0 connector J8 34 COM3 and COM4 voltage jumper J13 35 COM1 and COM2 voltage jumper J11 36 External Thermal Resister pin header J7 37 SPI pin header SPI1 38 SPI address jumper J6 39 COM2 pin header COM2 Table 1 Layout diag...

Page 17: ...M920 User Manual 6 1 4 Product Dimensions 170mm 33 02mm 10 16mm 170mm 6 35mm 6 17mm 132 13mm Figure 2 Mounting holes and dimensions of the VIA EPIA M920 Figure 3 External I O port dimensions of the VIA EPIA M920 ...

Page 18: ...920 User Manual 7 1 5 Height Distribution Figure 4 Height distribution of the VIA EPIA M920 for fan model Figure 5 Height distribution of the VIA EPIA M920 for fanless model Note All other heights are under 21mm ...

Page 19: ...ternal I O coastline 2 1 External I O Ports 1 8 2 3 4 9 10 5 11 6 7 12 Figure 6 Back panel I O ports Item Description 1 PS 2 mouse port 2 HDMI port 1 3 HDMI port 2 4 COM port 5 Gigabit Ethernet ports 6 Line in 7 Line out 8 PS 2 keyboard port 9 VGA port 10 USB 3 0 ports 11 USB 2 0 ports 12 Mic in Table 2 Layout diagram description table of the back panel I O ports ...

Page 20: ...NC 3 GND 4 5V 5 Clock 6 NC Table 3 PS 2 port pinouts 2 1 2 HDMI Port The integrated 19 pin HDMI port uses an HDMI Type A receptacle connector as defined in the HDMI specification The HDMI High Definition Multimedia Interface port is for connecting the High Definition video and digital audio The pinouts of the HDMI port are shown below Figure 8 HDMI port diagram Pin Signal Pin Signal 1 TX2 2 GND 3 ...

Page 21: ...rnet port are shown below Figure 10 Gigabit Ethernet port diagram Pin Signal 1 Signal pair 1 2 Signal pair 1 3 Signal pair 2 4 Signal pair 3 5 Signal pair 3 6 Signal pair 2 7 Signal pair 4 8 Signal pair 4 Table 6 Gigabit Ethernet port pinouts Each Gigabit Ethernet port has two individual LED indicators located on the front side to show its Active Link status and Speed status Active LED Left LED on...

Page 22: ...ine out Mic in Tip Left channel in Left channel Left channel Ring Right channel in Right channel Right channel Sleeve Ground Ground Ground Table 8 Audio jack receptacle pinouts 2 1 6 VGA Port The integrated 15 pin VGA port uses a female DE 15 connector The VGA port is for connecting to analog displays The pinouts of the VGA port are shown below Figure 12 VGA port diagram Pin Signal 1 Red 2 Green 3...

Page 23: ... The pinouts of the USB 3 0 port are shown below Figure 13 USB 3 0 port diagram Pin Signal 1 5V 2 Data 3 Data 4 GND 5 Rx 6 Rx 7 GND 8 Tx 9 Tx Table 10 USB 3 0 port pinout 2 1 8 USB 2 0 Port The VIA EPIA M920 is equipped with two USB 2 0 ports which gives complete Plug and Play and hot swap capability for external devices The USB 2 0 interface complies with USB UHCI Rev 2 0 The pinouts of the USB 2...

Page 24: ...X power connector is labeled as ATX_POWER1 The pinouts of the ATX power connector are shown below Figure 15 ATX power connector diagram Pin Signal Pin Signal 1 3 3V 11 3 3V 2 3 3V 12 12V 3 GND 13 GND 4 5V 14 PS_ON 5 GND 15 GND 6 5V 16 GND 7 GND 17 GND 8 PW OK 18 5V 9 5VSUS 19 5V 10 12V 20 5V Table 12 ATX power connector pinouts ...

Page 25: ... GND 2 PVDD1 1 NC 2 PVDD2 1 A4_L 4 PVDD1 3 NC 4 PVDD2 3 A4_L 6 GND 5 GND 6 GND 5 GND 8 GND 7 NC 8 GND 7 A5_L 10 LD1C0 9 NC 10 A0_L 9 A5_L 12 LD1C0 11 GND 12 A0_L 11 GND 14 GND 13 NC 14 GND 13 A6_L 16 LD1C1 15 NC 16 A1_L 15 A6_L 18 LD1C1 17 GND 18 A1_L 17 GND 20 GND 19 NC 20 GND 19 CLK2_L 22 LD1C2 21 NC 22 A2_L 21 CLK2_L 24 LD1C2 23 GND 24 A2_L 23 GND 26 GND 25 NC 26 GND 25 A7_L 28 LCLK1 27 NC 28 C...

Page 26: ...LVDS1 panel connector INVERTER2 corresponds to the LVDS2 panel connector The pinouts of the backlight control connectors are shown below INVERTER1 INVERTER2 1 1 1 1 Figure 17 Backlight control connector diagram INVERTER1 INVERTER2 Pin Signal Pin Signal 1 INV1_12 1 IVDD2 2 INV1_12 2 IVDD2 3 BLON1 3 BAKLITE 4 VX11PWM_CTL1 4 VX11PWM_CTL2 5 BLON1 5 BAKLITE 6 BRIGHTNESS1_CTL1 6 BRIGHTNESS2_CTL2 7 GND 7...

Page 27: ...er that supports four GPO and four GPI pins The pinouts of the Digital I O pin header are shown below 1 DIO1 Figure 18 Digital I O pin header diagram Pin Signal Pin Signal 1 5V_DIO 2 12V_DIO 3 GPO_37 4 GPI_53 5 GPO_36 6 GPI_52 7 GPO_35 8 GPI_51 9 GPO_34 10 GPI_50 11 GND Table 15 Digital I O pin header pinouts ...

Page 28: ...cable for detecting the system s internal air temperature The temperature reading can be seen in the BIOS Setup Utility The pin header is labeled as J7 The pinouts of the external thermal resister pin header are shown below Figure 19 External thermal resister pin header diagram Pin Signal 1 TMPIN2 2 TMPIN2 3 HWMGND Table 16 External thermal resister pin header pinouts ...

Page 29: ...s F_PANEL1 It provides access to system LEDs power reset system speaker and HDD LED The pinouts of the front panel pin header are shown below 1 F_PANEL1 Figure 20 Front panel pin header diagram Pin Signal Pin Signal 1 5VDUAL 2 3 3V 3 5VDUAL 4 SATA_LED 5 PWR_LED 6 PWR_BTN 7 5V 8 GND 9 NC 10 RST_SW 11 NC 12 GND 13 SPEAK 14 5V 15 16 SLEEPLED Table 17 Front panel pin header pinouts ...

Page 30: ...necting the SMBus devices The devices communicate with an SMBus host and or other SMBus devices using the SMBus interface It is labeled as SMBUS The pinouts of the SMBus pin header are shown below SMBUS1 1 Figure 21 SMBus pin header diagram Pin Signal 1 SMBCK 2 SMBDT 3 GND Table 18 SMBus pin header pinouts ...

Page 31: ...led as CPUFAN1 and the fan connector for the system is labeled as SYSFAN1 The fans provide variable fan speeds controlled by the BIOS The pinouts of the fan connectors are shown below CPUFAN1 1 1 SYSFAN1 Figure 22 CPU and System fan connector diagram CPUFAN1 SYSFAN1 Pin Signal Pin Signal 1 F_I01 1 F_I02 2 F_PWM1 2 F_PWM2 3 GND 3 GND Table 19 CPU and System fan connectors pinouts ...

Page 32: ...The pinouts of the SATA connectors are shown below Figure 23 SATA connector diagram SATA1 SATA2 Pin Signal Pin Signal 1 GND 1 GND 2 STXP_0 2 STXP_1 3 STXN_0 3 STXN_1 4 GND 4 GND 5 SRXN_0 5 SRXN_1 6 SRXP_0 6 SRXP_1 7 SATA1_ 5V 7 SATA2_ 5V Table 20 SATA connectors pinouts Note If users want to use the SATA Disk on Module flash drive on the board please use the SATA2 connector ...

Page 33: ...e labeled as USB_1 and USB_2 The pinouts of the USB 2 0 pin headers are shown below Figure 24 USB 2 0 pin header diagram USB_1 USB_2 Pin Signal Pin Signal Pin Signal Pin Signal 1 5CDUAL 2 5CDUAL 1 5CDUAL 2 5CDUAL 3 USBD_T1 4 USBD_T0 3 USBD_T3 4 USBD_T2 5 USBD_T1 6 USBD_T0 5 USBD_T3 6 USBD_T2 7 GND 8 GND 7 GND 8 GND 9 10 GND 9 10 GND Table 21 USB 2 0 pin headers pinouts ...

Page 34: ...32 standard The pin headers are labeled as COM2 COM3 and COM4 All of the COM pin headers can support 5V or 12V The pinouts of the COM pin headers are shown below COM3 1 COM2 1 COM4 1 Figure 25 COM pin header diagram Pin Signal Pin Signal 1 COM_DCD 2 COM_RXD 3 GND 4 COM_DTR 5 GND 6 COM_DSR 7 COM_RTS 8 COM_CTS 9 COM_RI 10 Table 22 COM pin header pinouts ...

Page 35: ...The pinouts of the PS 2 keyboard and mouse pin header are shown below 1 JKBMS Figure 26 PS 2 keyboard and mouse pin header diagram Pin Signal Pin Signal 1 VCCE 2 GND 3 KBCK 4 KBDT 5 EKBCLK 6 EKBDATA 7 MSCK 8 MSDT 9 EMSCLK 10 EMSDATA Table 23 PS 2 keyboard and mouse pin header pinouts Note When the pin header is not in use please short pin 3 5 pin 4 6 pin 7 9 and pin 8 10 ...

Page 36: ...PIA M920 has a pin header for Line out and Mic in The pin header is labeled as F_AUDIO1 The pinouts of the front audio pin header are shown below Figure 27 Front audio pin header Pin Signal Pin Signal 1 MIC2IN_L 2 AGND 3 MIC2IN_R 4 AGND 5 HPOUTR 6 MIC2_JD 7 F_AUDIO_SENSE 8 9 HPOUTL 10 HPOUT_JD Table 24 Front audio pin header pinouts ...

Page 37: ... pin header is used to connect to the SPI BIOS programming fixture The pin header is labeled as SPI1 The pinouts of the SPI pin header are shown below 1 SPI1 Figure 28 SPI pin header diagram Pin Signal Pin Signal 1 SPIVCC 2 GND 3 MSPISA 4 MSPICLK 5 MSPIDI 6 MSPIDO 7 8 PCIRST Table 25 SPI pin header pinouts ...

Page 38: ...ader is labeled as LPC The pinouts of the LPC pin header are shown below 1 LPC1 Figure 29 LPC pin header diagram Pin Signal Pin Signal 1 LPCAD1 2 LPC33CLK 3 LPCRST 4 GND 5 LPCAD0 6 LPC48CLK 7 LPCAD2 8 LPCFRAME 9 SERIRQ 10 LPCAD3 11 LPCDRQ1 12 EXTSMI 13 5V 14 3 3V 15 5V 16 3 3V 17 GND 18 GND 19 GND Table 26 LPC pin header pinouts ...

Page 39: ... are shown below Figure 30 S PDIF connector diagram Pin Signal 1 5V 2 SPDIFO 3 GND Table 27 S PDIF connector pinouts 2 2 17 CMOS Battery Slot The VIA EPIA M920 is equipped with a CMOS battery slot which is compatible with CR2032 coin batteries The CMOS battery slot is labeled as BAT2 When inserting a CR2032 coin battery be sure that the positive side is facing the locking clip The pinouts of the C...

Page 40: ...al USB 3 0 port The connector is labeled as J8 The pinouts of the USB 3 0 connector are shown below 1 Figure 32 USB 3 0 connector diagram Pin Signal 1 USBH OC8 2 USBSSRX_N2 3 USBSSRX_P2 4 GND 5 USBSSTX_N2 6 USBSSTX_P2 7 GND 8 USBHP_N8 9 USBHP_P8 10 11 12 13 GND 14 15 16 GND 17 18 19 5VSUS Table 29 USB 3 0 connector pinouts ...

Page 41: ...r Setting There are two settings of the jumper pin Short and Open The pins are Short when a jumper cap is placed on the pair of pins The pins are Open if the jumper cap is removed In addition there are jumpers that have three or more pins and some pins are arranged in series In case of a jumper with three pins place the jumper cap on pin 1 and pin 2 or pin 2 and 3 to Short it Some jumpers size are...

Page 42: ... 1 and 2 afterwards Setting the jumper while the system is on will damage the board The default setting is Short pins 1 and 2 Figure 34 Clear CMOS jumper diagram Settings Pin 1 Pin 2 Pin 3 Regular default Short Short Open Clear CMOS Open Short Short Table 30 Clear CMOS jumper settings Note Except when clearing the RTC RAM never remove the cap from the Clear CMOS jumper default position Removing th...

Page 43: ...2 When the jumpers are set 5V will be delivered to the 7th pin of the SATA connectors The jumper settings are shown below Figure 35 SATA DOM power jumper diagram SATA1 Settings Pin 2 Pin 4 Pin 6 DOM support Short Short Open Regular default Open Short Short SATA2 Settings Pin 1 Pin 3 Pin 5 DOM support Short Short Open Regular default Open Short Short Table 31 SATA DOM power jumper settings ...

Page 44: ...fault setting The odd pin numbers correspond to COM1 The even pin numbers correspond to COM2 The jumper settings are shown below Figure 36 COM1 and COM2 voltage jumper diagram COM1 Settings Pin 1 Pin 3 Pin 5 5V default Short Short Open 12V Open Short Short COM2 Settings Pin 2 Pin 4 Pin 6 5V default Short Short Open 12V Open Short Short Table 32 COM1 and COM2 voltage jumper settings ...

Page 45: ...fault setting The odd pin numbers correspond to COM3 The even pin numbers correspond to COM4 The jumper settings are shown below Figure 37 COM3 and COM4 voltage jumper diagram COM3 Settings Pin 2 Pin 4 Pin 6 5V default Short Short Open 12V Open Short Short COM4 Settings Pin 1 Pin 3 Pin 5 5V default Short Short Open 12V Open Short Short Table 33 COM3 and COM4 voltage jumper settings ...

Page 46: ...ion of address for SPI pin header is controlled by the jumper J6 The jumper settings are shown below Figure 38 SPI address jumper diagram Settings Pin 1 Pin 2 Pin 3 MSPISS0 default Short Short Open MSPISS1 Open Short Short Table 34 SPI address jumper settings ...

Page 47: ... power is controlled by the jumper J9 The jumper settings are shown below Figure 39 VDD power jumper diagram Settings Pin 1 Pin 2 Pin 3 VDD 1 0V Open Open Open VDD 0 9V Short Short Open VDD control by MPSVID default Open Short Short Table 35 VDD power jumper settings ...

Page 48: ...ntrols the voltage delivered to the LVDS2 panel connector and input voltage delivered to the INVERTER2 connector Figure 40 LVDS1 and LVDS2 power jumper diagrams Table 36 LVDS1 and LVDS2 power jumper settings LVDS1 power jumper J14 Inverter1 Settings Pin 1 Pin 3 Pin 5 12V default Short Short Open 5V Open Short Short LVDS1 panel Settings Pin 2 Pin 4 Pin 6 3 3V default Short Short Open 5V Open Short ...

Page 49: ...oltage input for the DDR3 SODIMM memory is controlled by the jumper J16 The jumper settings are shown below J16 1 Figure 41 DDR3 SODIMM voltage jumper diagram Settings Pin 1 Pin 2 Pin 3 1 5V default Short Short Open 1 35V Open Short Short Table 37 DDR3 SODIMM voltage jumper settings ...

Page 50: ...s are shown below SODIMM1 SODIMM2 Figure 42 DDR3 memory slots diagram 4 1 1 Installing a Memory Module Step 1 Disengage the locking clasps at both ends of the memory slot Align the notch on the bottom of the SODIMM memory module with the notch wedge in the slot Figure 43 Inserting the memory module Step 2 Slide the SODIMM memory module into the side grooves and push the module into the slot until ...

Page 51: ...p 1 Disengage the locking clips at both ends of the memory slot Figure 45 Disengaging the locking clips Step 2 When the locking clips have been cleared the SODIMM memory module will automatically pop up Remove the memory module Figure 46 Removing the memory module ...

Page 52: ...The PCI Express slot provides support for 4 lane cards Due to the orientation of the slot a riser card module1 must be used The location of the PCI Express slot is shown below Figure 47 PCI Express slot diagram Note 1 The optional riser card is PCIE 03 ...

Page 53: ...um Chassis Dimensions The figure below shows the suggested minimum space requirements that a chassis should have in order to work well with the VIA EPIA M920 Figure 48 Suggested minimum chassis dimensions Each side of the board should have a buffer zone from the internal wall of the chassis The side of the board that accommodates the I O coastline should have a buffer of 1mm The side on the opposi...

Page 54: ... necessary for the internal ceiling to be evenly flat What is required is that the internal ceiling height must be strictly observed for each section that is highlighted The highest part of the ceiling will be above the PCIe slot Figure 49 Suggested minimum internal chassis ceiling height for fanless model Figure 50 Suggested minimum internal chassis ceiling height for fan model ...

Page 55: ...VIA EPIA M920 User Manual 44 5 1 3 Suggested Keepout Areas The figure below shows the areas of the board that we recommend should be left unobstructed Figure 51 Suggested keepout areas ...

Page 56: ...3 Load optimized defaults F4 Save all the changes and exit Notes 1 Must be pressed using the 10 key pad 2 The General help contents are only for the Status Page and Option Page setup menus 6 3 Navigating the BIOS Menus The main menu displays all the BIOS setup categories Use the Left Right and Up Down arrow keys to select any item or sub menu Descriptions of the selected highlighted category are d...

Page 57: ...hat is installed on the hardware platform 6 5 3 System Language This option allows the user to configure the language that the user wants to use 6 5 4 System Date This section shows the current system date Press Tab to traverse right and Shift Tab to traverse left through the month day and year segments The and keys on the number pad can be used to change the values The weekday name is automatical...

Page 58: ...creen links can be identified by the preceding right facing arrowhead Figure 53 Illustration of the Advanced Settings screen The Advanced Settings screen contains the following links ACPI Settings S5 RTC Wake Settings CPU Information SATA Configuration F71869 Super IO Configuration F71869 H W Monitor Clock Generator Configuration On Board Configuration ...

Page 59: ...gure 54 Illustration of the ACPI Settings screen 6 6 1 1 Enable Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS 6 6 1 2 ACPI Sleep State Select ACPI sleep state the system will enter when the SUSPEND button is pressed Available options are Suspend Disabled S1 only CPU Stop Clock S3 only Suspend to RAM Both S1 and S3 availa...

Page 60: ...reen 6 6 2 1 Wake system with Fixed Time This feature has two options Enable or Disable system wake on alarm event When enabled system will wake on the hr min sec specified 6 6 2 2 Wake system with Dynamic Time This feature has two options Enable or Disable system wake on alarm event When enabled system will wake on the current time increase minute s ...

Page 61: ...nfiguration The SATA Configuration screen allows the user to view and configure the settings of the SATA configuration settings Figure 57 Illustration of SATA Configuration screen 6 6 4 1 SATA Mode This option allows the user to manually configure SATA controller for a particular mode IDE Mode Set this value to change the SATA to IDE mode AHCI Mode Set this value to change the SATA to AHCI mode ...

Page 62: ...ion screen 6 6 5 1 Serial Port 0 Configuration Set parameters of Serial Port 0 COMA 6 6 5 1 1 Serial Port This feature has two options Enable or Disable Serial Port COM 6 6 5 2 Serial Port 1 Configuration Set parameters of Serial Port 1 COMB 6 6 5 2 1 Serial Port This feature has two options Enable or Disable Serial Port COM 6 6 5 2 2 Device Mode Change the Serial Port mode Select High Speed or No...

Page 63: ...H W Monitor screen 6 6 6 1 CPU Smart Fan Configuration CPU Smart Fan Configuration Setting 6 6 6 1 1 Smart Fan Support This feature has two options Enable or Disable Smart Fan 6 6 6 2 System Smart Fan Configuration System Smart Fan Configuration Setting 6 6 6 2 1 Smart Fan Support This feature has two options Enable or Disable Smart Fan ...

Page 64: ...n screen 6 6 7 1 CPU Spread Spectrum The Spread Spectrum Setting feature enables the BIOS to modulate the clock frequencies originating from the board The settings are in percentages of modulation Higher percentages result in greater modulation of clock frequencies This feature has 3 options Disable 0 25 and 0 5 6 6 7 2 PCIe Spread Spectrum Select PCIe Spread Spectrum This feature has two options ...

Page 65: ...e PCI bus 6 6 8 3 EuP ErP Lot6 support The EuP ErP Lot6 Support feature enables the BIOS to reduce the power draw to less than 1W when the system is in standby mode This feature has two options enabled and disabled 6 6 8 4 1CH LVDS Backlight Control Backlight Control The Backlight Control feature control by VX11H enables the user to control the brightness of the 1CH LVDS backlight This feature has...

Page 66: ...sub screen Sub screen links can be identified by the preceding right facing arrowhead Figure 62 Illustration of Chipset Settings screen The Chipset Settings screen contains the following links DRAM Configuration Video Configuration UART Configuration PMU ACPI Configuration HDAC Configuration SDIO_CR Configuration Others Configuration ...

Page 67: ... option forces the BIOS to be fixed at 1132MHz for DDR3 memory modules 600MHz The 600MHz option forces the BIOS to be fixed at 1200MHz for DDR3 memory modules 633MHz The 633MHz option forces the BIOS to be fixed at 1266MHz for DDR3 memory modules 667MHz The 667MHz option forces the BIOS to be fixed at 1334MHz for DDR3 memory modules 700MHz The 700MHz option forces the BIOS to be fixed at 1400MHz f...

Page 68: ... a graphics adapter There are three paths that can be chosen PCIE PCI UMA UMA PCIE PCI 6 7 2 3 Select Display Device Control Available selections are Auto and Manual 6 7 2 4 Select Display Device 1 and 2 The Select Display Device feature enables the user to choose a specific display interface This feature has four options CRT LCD LCD2 HDMI and HDMI2 If both Select Display Device 1 and Select Displ...

Page 69: ...4 1280 x 1024 12 1680 x 1050 05 1400 x 1050 13 1920 x 1200 06 1440 x 900 14 1920 x 1080 07 1280 x 800 15 1024 x 576 6 7 2 6 Panel Type2 The Panel Type feature enables the user to specify the resolution of display 2 being used with the system The panel types are predefined in the VGA VBIOS Panel Type Resolution Panel Type Resolution 00 640 x 480 08 800 x 480 01 800 x 600 09 1024 x 600 02 1024 x 768...

Page 70: ...onfiguration screen allows the user to set UART configuration parameters Figure 65 Illustration of UART Configuration screen 6 7 3 1 UART 0 Enable This feature has 2 options Enable Disable UART 0 6 7 3 2 UART 1 Enable This feature has 2 options Enable Disable UART 1 ...

Page 71: ...MU_ACPI Configuration The PMU_ACPI Configuration screen can be used to set a number of power management related functions Figure 66 Illustration of PMU_ACPI Configuration screen Other Control Figure 67 Illustration of Other Control screen ...

Page 72: ...Off option keeps the system in an off state until the power button is pressed again Power On The Power On option restarts the system when the power has returned Last State The Last State option restores the system to its previous state when the power was interrupted 6 7 4 1 2 USB S4 WakeUp The USB S4 WakeUp enables the system to resume through the USB device port from S4 state There are two option...

Page 73: ...M920 User Manual 62 6 7 5 HDAC Configuration HDAC Configuration Parameters Figure 68 Illustration of HDAC Configuration screen 6 7 5 1 OnChip HDAC Device This feature has 2 options Enable or Disable HDAC Control ...

Page 74: ...d Support This feature has two options Enable or Disable High Speed Support 6 7 6 1 5 Driver Type Select Select Driver Type from Type A Type B Type C and Type D 6 7 6 1 6 SDR50 Support This feature has two options Enable or Disable SDR50 Support 6 7 6 1 7 SDR104 Support This feature has two options Enable or Disable SDR104 Support 6 7 6 1 8 DDR50 Support This feature has two options Enable or Disa...

Page 75: ...tion Figure 70 Illustration of Others Configuration screen 6 7 7 1 WATCHDOG Timer Enable When this feature is enabled an embedded timing device automatically prompts corrective action upon system malfunction detection 6 7 7 2 Keyboard Mouse Wakeup Control When this feature is enabled pressing any key of the keyboard or moving the mouse can wake up the system from suspend ...

Page 76: ...nds to wait for setup activation key 65535 0xFFFF means indefinite waiting 6 8 1 2 BootupNumLock State Select the keyboard NumLock state from On and Off 6 8 1 3 Display Logo The Display Logo feature hides all of the Power on Self Test POST messages during the boot sequence Instead of the POST messages the user will see an OEM logo This feature has two options enabled and disabled 6 8 2 Boot Option...

Page 77: ...EPIA M920 User Manual 66 6 8 3 Network Device BBS Priorities 6 8 3 1 Launch PXE OpROM policy Do not launch Prevent the option for Legacy Network Device Legacy only Allow the option for Legacy Network Device ...

Page 78: ...ord is set the Password Check option will be unlocked 6 9 1 2 Password Check This feature is compulsory when the Change Supervisor Password option is set The user will have up to three chances to enter the correct password before the BIOS forces the system to stop booting If the user does not enter the correct password the keyboard will also lock up The only way to get past this is to do a hard re...

Page 79: ...ey can also be used to trigger this command 6 10 3 Save Changes and Reset Save all changes to the BIOS and reboot the system The new system configuration parameters will take effect 6 10 4 Discard Changes and Reset This command reverts all changes to the settings that were in place when the BIOS Setup Utility was launched The F2 hotkey can also be used to trigger this command Save Options 6 10 5 S...

Page 80: ...M920 User Manual 69 Boot Override 6 10 7 VIA Networking Bootagent 6 10 8 Launch EFI Shell from filesystem device Attempts to Launch EFI Shell application Shellx64 efi from one of the available filesystem devices ...

Page 81: ...nto a distribution package Installing a third party driver such as the ALSA driver from the Advanced Linux Sound Architecture project for integrated audio 7 2 Technical Support and Assistance For utilities downloads latest documentation and information about the VIA EPIA M920 please visit our website at http www viatech com en boards mini itx epia m920 For technical support and additional assistan...

Page 82: ...533 USB Wi Fi Module Step 1 Mount the VIA EMIO 1533 module to the prepared standoff in the chassis Align the two mounting holes on the VIA EMIO 1533 module with the mounting holes on the standoffs and then secure the VIA EMIO 1533 module in place with two screws Figure 74 Installing VIA EMIO 1533 module to the chassis Step 2 Connect one end of the USB Wi Fi cable to the onboard USB 2 0 connector U...

Page 83: ... the toothed washer fasten it with the nut and install the external antenna Figure 76 Installing Wi Fi antenna cable VIA EMIO 1533 Step 4 Connect the other end of the Wi Fi antenna cable to the micro RF connector labeled I PEX on the VIA EMIO 1533 module Figure 77 Connecting Wi Fi antenna cable to the micro RF connector VIA EMIO 1533 ...

Page 84: ...5531 module with the mounting holes on the standoffs and then secure the VIA EMIO 5531 module in place with two screws Figure 78 Installing VIA EMIO 5531 module to the chassis Step 2 Connect one end of the USB Wi Fi cable to the onboard USB 2 0 connector USB_1 on the VIA EPIA M920 board and then connect the other end of the cable to the VIA EMIO 5531 module Figure 79 Connecting the USB Wi Fi cable...

Page 85: ... the toothed washer fasten it with the nut and install the external antenna Figure 80 Installing Wi Fi antenna cable VIA EMIO 5531 Step 4 Connect the other end of the Wi Fi antenna cable to the micro RF connector labeled I PEX on the VIA EMIO 5531 module Figure 81 Connecting Wi Fi antenna cable to the micro RF connector VIA EMIO 5531 ...

Page 86: ... 0 130 0 401 Main Board 5V 4 777 0 668 3 191 Main Board 5VSB 4 646 0 546 2 537 Main Board 12V 11 767 0 590 6 943 Main Board Power Consumption 13 072 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 097 0 155 0 480 Main Board 5V 4 790 0 714 3 420 Main Board 5VSB 4 692 0 671 3 148 Main Board 12V 11 778 0 641 7 550 Main Board Power Consumption 14 598 B 1 2 S3 Status MEAN Measured Voltage...

Page 87: ...1 518 Main Board 5V 4 832 1 081 5 223 Main Board 5VSB 4 887 0 474 2 316 Main Board 12V 11 794 0 732 8 633 Main Board Power Consumption 17 691 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 211 0 520 1 670 Main Board 5V 4 942 1 377 6 805 Main Board 5VSB 4 992 0 745 3 719 Main Board 12V 11 897 0 916 10 898 Main Board Power Consumption 23 092 B 1 5 Graphics Run 3D Marks 06 MEAN Measure...

Page 88: ...12 0 596 1 855 Main Board 5V 4 688 1 150 5 391 Main Board 5VSB 4 653 0 608 2 829 Main Board 12V 11 698 0 746 8 727 Main Board Power Consumption 18 802 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 147 0 629 1 979 Main Board 5V 4 715 1 489 7 021 Main Board 5VSB 4 712 0 732 3 449 Main Board 12V 11 788 0 883 10 409 Main Board Power Consumption 22 858 B 1 8 S5 Status MEAN Measured Volt...

Page 89: ...ain Board Power Consumption 11 215 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 275 0 431 1 412 Main Board 5V 5 020 1 036 5 201 Main Board 5VSB 5 074 0 367 1 862 Main Board 12V 11 970 0 503 6 021 Main Board Power Consumption 14 495 B 2 2 S3 Status MEAN Measured Voltage Measured Current Watts Main Board 3 3V 0 014 0 000 0 000 Main Board 5V 0 000 0 000 0 000 Main Board 5VSB 5 111 0 ...

Page 90: ...1 441 Main Board 5V 4 721 1 243 5 868 Main Board 5VSB 4 764 0 841 4 007 Main Board 12V 11 696 0 447 5 228 Main Board Power Consumption 16 544 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 120 0 509 1 588 Main Board 5V 4 846 1 638 7 938 Main Board 5VSB 4 896 0 987 4 832 Main Board 12V 11 808 0 553 6 530 Main Board Power Consumption 20 888 B 2 5 Graphics Run 3D Marks 06 MEAN Measured...

Page 91: ...3 0 766 2 446 Main Board 5V 4 776 1 195 5 707 Main Board 5VSB 4 843 0 466 2 257 Main Board 12V 11 783 0 636 7 494 Main Board Power Consumption 17 904 MAX Measured Voltage Measured Current Watts Main Board 3 3V 3 231 0 778 2 514 Main Board 5V 4 803 1 431 6 873 Main Board 5VSB 4 872 0 485 2 363 Main Board 12V 11 818 0 713 8 426 Main Board Power Consumption 20 176 B 2 8 S5 Status MEAN Measured Voltag...

Page 92: ...nt audio pin header F_AUDIO1 99G30 05458I Neltron 2207S XXG N A Neltron 2207R XXG Neltron 2207SM XXG 45 System fan connector SYSFAN 99G30 020035 Neltron 2218H 03 N A Backlight control connectors INVERTER1 INVERTER2 99G30 020537 ACES 85206 0800 MOLEX 51021 00 LVDS panel connectors LVDS1 LVDS2 99G30 170152 ACES 44002 XX00 DF13 DS 1 258C USB 2 0 pin header USB_1 USB_2 99G30 05072K Neltron 2214S XXG 8...

Page 93: ...10 687 4654 Email embedded viatech com Email embedded via tech eu Taiwan Headquarters USA Europe Tsinghua Science Park Bldg 7 No 1 Zongguancun East Road Haidian Dist Beijing 100084 China Tel 86 10 59852288 Fax 86 10 59852299 Email embedded viatech com cn 3 15 7 Ebisu MT Bldg 6F Higashi Shibuya ku Tokyo 150 0011 Japan Tel 81 3 5466 1637 Fax 81 3 5466 1638 Email embedded viatech co jp China Japan ...

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