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6. DDR3 SDRAM 1Gb G-die
6.1 Description:
The 1Gb DDR3 SDRAM G-die is organized as a 8Mbit x 16 I/Os x 8banks device. This
synchronous device achieves high speed double-data-rate transfer rates of up to
2133Mb/sec/pin(DDR3-2133)for general applications. The chip is designed to comply with
the following key DDR3 SDRAM features such as posted CAS, Programmable CWL,
Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset . All
of the control and address inputs are synchronized with a pair of externally supplied
differential clocks. Inputs are latched at the crosspoint of differential clocks (CK rising and
CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in
a source synchronous fashion. The address bus is used to convey row, column, and bank
address information in a RAS/CAS multiplexing style. The DDR3 device operates with a
single 1.5V ± 0.075V power supply and 1.5V ± 0.075V VDDQ. The 1Gb DDR3 G-die device
is available in 96ball FBGA(x16).
6.2 Features
• JEDEC standard 1.5V ± 0.075V Power Supply
• VDDQ = 1.5V ± 0.075V
• 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for 1333Mb/sec/pin,
800MHz fCK for 1600Mb/sec/pin, 933 MHz fCK for 1866Mb/sec/pin,
1066 MHz fCK for 2133Mb/sec/pin
• 8 Banks
• Programmable CAS Latency(posted CAS): 5, 6, 7, 8, 9, 10, 11, 12,
13, 14
• Programmable Additive Latency: 0, CL-2 or CL-1 clock
• Programmable CAS Write Latency (CWL) = 6 (DDR3-1066), 7
(DDR3-1333), 8 (DDR3-1600), 9 (DDR3-1866), 10 (DDR3-2133)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting
address “000” only), 4 with tCCD = 4 which does not allow seamless
read or write [either On the fly using A12 or MRS]
• Bi-directional Differential Data-Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin
(RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at
85°C < TCASE < 95 °C
• Asynchronous Reset
• Package : 96 balls FBGA - x16
• All of Lead-Free products are compliant for RoHS
• All of products are Halogen-free
Summary of Contents for 17MB82S
Page 1: ......
Page 4: ...4 1 1 General Block Diagram...
Page 5: ...5 1 2 MB82S Placement of Blocks...
Page 8: ...8 2 3 Absolute Ratings 2 3 1 ELECTRICAL CHARACTERISTICS...
Page 9: ...9...
Page 10: ...10 2 3 2 OPERATING SPECIFICATIONS...
Page 11: ...11 2 4 Pinning...
Page 12: ...12...
Page 13: ...13...
Page 14: ...14 TS4962M optional 2 5W...
Page 16: ...16...
Page 27: ...27 x16 Package Pinout Top view 96ball FBGA Package...
Page 28: ...28 7 SCALER AND LVDS SOCKETS 7 1 LVDS sockets Block Diagram...
Page 30: ...30 8 1 2 Features 8 1 3 Block Diagram...
Page 31: ...31 8 1 4 Pinning...
Page 33: ...33 8 2 3 Block Diagram 8 2 4 Pinning...
Page 34: ...34...
Page 37: ...37 10 3 VGA CN711 10 4 SCART SC1...
Page 39: ...39 11 1 Video Settings...
Page 40: ...40 11 2 Audio Settings...
Page 41: ...41 11 3 Options Options 1...
Page 42: ...42 Options 2...
Page 43: ...43 11 4 Tuning Settings...
Page 44: ...44 11 5 Source Settings...
Page 51: ...51 13 4 IR Problem Problem LED or IR not working Check LED card supply on MB82 chasis...