Tetra (VL-EPC-2700) User’s Guide
17
Interfaces and Connectors
Connectors and Jumpers
V1 – BOOT_MODE0 Jumper
The EPC-2700 uses a jumper to provide access to two required boot modes. BOOT_MODE[1:0]
are input pins on the i.MX6 quad-core processor, and when not connected, the signals are held
low by 100k Ohm pull-downs internal to the SoC. By default, the jumper is in the store position
resting on pin 2 (open) and the BOOT_MODE[1:0] settings of “00” select the default mode of
“Boot from fuses.”
Note
: When the fuses have not yet been blown (OTP), the boot attempt will automatically switch
to the “Serial downloader” method for the i.MX 6. It then, may accept commands and
programming from a USB Host (provided that the V2 jumper is removed/stored - setting the USB
OTG port in Device mode).
The only time the jumper needs to be placed on pins 1-2 (BOOT_MODE[1:0] settings of “01”) is to
force the boot mode to use the “Serial downloader” instead of the fuses. At that point, a new
image can be loaded to the on-board memory device (like the SPI Flash) or new DDR device
Calibrations and Stress Testing can be run.
Do not hot-plug this jumper. There is no ESD protection employed and the settings are only read
when POR# is tripped.
VersaLogic part number for the jumper header is X2H2S1-R.
Table 5. V1 Pinout
Pin
Signal Name
1
PU_BOOT_MODE0
2
BOOT_MODE0
V2 - USB_OTG_ID Jumper
The EPC-2700 uses a jumper to provide control settings for the USB OTG block, allowing it to function
as either an OTG port set to device mode or set to host mode. By default, the jumper is in the store
position resting on pin 2 (open) so that the USB_OTG_ID signal is pulled high (device mode).
When the jumper is placed on pins 1-2, the USB_OTG_ID signal is grounded, which forces the
i.MX6 quad-core processor OTG port to behave as a Host enabling VBUS 5V power switch for the
USB port.
Note:
Do not hot-plug this jumper. Host Negotiation Protocol (HNP) is not enabled for the port and
there is no ESD protection employed.
VersaLogic part number for the jumper header is X2H2S1-R.
Table 6. V2 Pinout
Pin
Signal Name
1
USB_OTG_ID
2
GND
4
