United Electronic Industries DNx-AO-308-353 User Manual Download Page 16

Page: 16 / 23

Chapter 3

Programming with the Low-Level API

Tel: 508-921-4600

www.ueidaq.com

Vers:

1.4

Date:

September 2010

File:

AO-308-353 Chap3.fm

United Electronic Industries, Inc.

Chapter 3

Programming with the Low-Level API

This section describes how to program the PowerDNA cube using the
low-level API. The low-level API offers direct access to PowerDNA
DAQBIOS protocol and also allows you to access device registers
directly.

We recommend that, where possible, you use the UeiDaq Framework
high-level API (

see

“Programming with the Ueidaq Framework API” on

page 8), which is easier to use than the low-level API.

You need to use the low-level API only if you are using an operating
system other than Windows.

3.1

Configuration
Settings

Configuration settings are passed in

DqCmdSetCfg()

and

DqAcbInitOps()

functions.

Not all configuration bits apply to DNA-AO-308x series (AO-308, AO-
308-350, AO-308-353, AO-308-420) boards, however. The following bits
make sense:

#define DQ_FIFO_MODEFIFO (2L << 16)

// continuous acquisition with FIFO

#define DQ_LN_MAPPED (1L<<15)

// For WRRD (DMAP) devices

//(automatically selected)

#define DQ_LN_STREAMING (1L<<14)

// For RDFIFO devices - stream the FIFO data

//(automatically selected) For WRFIFO - do NOT

//send reply to WRFIFO unless needed

#define DQ_LN_IRQEN (1L<<10) //enable irqs

#define DQ_LN_PTRIGEDGE1 (1L<<9)

// stop trigger edge MSB

#define DQ_LN_PTRIGEDGE0 (1L<<8)

// stop trigger edge: 00 - software,

// 01 - rising, 02 – falling

#define DQ_LN_STRIGEDGE1 (1L<<7)

// start trigger edge MSB

#define DQ_LN_STRIGEDGE0 (1L<<6)

// start trigger edge: 00 - software,

//01 -rising, 02 - falling

#define DQ_LN_CVCKSRC1 (1L<<5)

// CV clock source MSB

#define DQ_LN_CVCKSRC0 (1L<<4)

// CV clock source 01 - SW,10 - HW, 11 –EXT

#define DQ_LN_CLCKSRC1 (1L<<3)

// CL clock source MSB

#define DQ_LN_CLCKSRC0 (1L<<2)

// CL clock source 01 - SW,10 - HW,11 –EXT

#define DQ_LN_ACTIVE (1L<<1)

Summary of Contents for DNx-AO-308-353

Page 1: ...nual 8 Channel 16 bit High Voltage Analog Output Board up to 40V 5mA for the PowerDNA Cube and RACK Series Chassis April 2020 PN Man DNA AO 308 353 0910 Copyright 1998 2020 United Electronic Industries Inc All rights reserved ...

Page 2: ...0 Also see the FAQs and online Live Help feature on our web site Internet Support Support support ueidaq com Web Site www ueidaq com FTP Site ftp ftp ueidaq com Product Disclaimer WARNING DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES INC AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS Products sold by United Electronic Industries Inc are not authorized for use as critical comp...

Page 3: ...iii ...

Page 4: ...Device Architecture 4 1 4 Board Connectors and Wiring 5 1 4 1 Connectors 5 1 4 2 Interconnecting a DNx AO 308 353 and a DNx PC 913 6 Chapter 2 Programming with the High Level API 8 2 1 Programming with the Ueidaq Framework API 8 2 1 1 Creating a Session 8 2 1 2 Configuring the Channels 8 2 1 3 Configuring the Timing 8 2 1 4 Writing Data 9 2 1 5 Cleaning up the Session 9 Chapter 3 Programming with ...

Page 5: ...Industries Inc List of Figures 1 1 DNA AO 308 353 Board 4 1 2 Block Diagram of AO 308 353 Device Architecture 4 1 3 DB 37 I O Connector Pinout of the AO 308 353 5 1 4 DNx PC 913 and AO 308 353 Interconnection Diagram 6 1 5 Physical Layout of AO 308 353 Board 7 1 6 Diagram of AO 308 353 Board Position Jumper Settings 7 ...

Page 6: ...vi Tel 508 921 4600 www ueidaq com Vers 1 4 Date September 2010 File AO 308 353LOT fm Copyright 2009 United Electronic Industries Inc List of Tables 1 1 DNA AO 308 353 Technical Specifications 3 ...

Page 7: ...evice architecture connectivity logic and accessories for the DNx AO 308 353 board 1 1 3 Programming with the High Level API This chapter provides a general overview of procedures that show how to create a session configure the session and generate output on a DNx AO 308 353 board working with the UEIDAQ Framework High Level API 1 1 4 Programming with the Low Level API This chapter describes the L...

Page 8: ...e 1 2 The DNA AO 308 Series Analog Output Boards The DNx AO 308 series of Analog Output boards includes the following products AO 308 16 bit 8 channel 10V Analog Output board AO 308 350 16 bit 8 channel 10V High Current Analog Output board AO 308 353 16 bit 8 channel 40V High Voltage Analog Output board AO 308 420 16 bit 8 channel 4 20 mA Current Analog Output board The DNA AO 308 353 DNR AO 308 3...

Page 9: ... 800kHz max aggregate Buffer Size 1K samples Type of D A double buffered INL no load 1 LSB 0 003 DNL no load 1 LSB 0 003 Monotonicity Over Temperature 16 bits Gain Linearity Error 0 002 Gain Calibration Error 1 mV Offset Calibration Error 1 mV Offset Drift 5ppm C Gain Drift 5ppm C Output Range 40V Output Coupling DC Output Impedance 0 1Ω max Current Drive 5mA channel Capacitive Loads 500 pF Settli...

Page 10: ...output channels A Block Diagram of the board is shown in Figure 1 2 Figure 1 2 Block Diagram of AO 308 353 Device Architecture DB 37 female 37 pin I O connector 120 pin DNA Board Position Jumpers IRQ Jumpers Do not change Power Connector bus connector see Figure 1 4 Analog Output Connector 32 bit 66 MHz bus Optical Isolation Calibration Reference Protection Control Logic Control Logic Calibration ...

Page 11: ...e AO 308 353 board is shown in Figure 1 3 A diagram for using the PC 913 for supplying external power to the AO 308 353 is shown in Figure 1 6 Figure 1 3 DB 37 I O Connector Pinout of the AO 308 353 Note If powering externally connect 45V power supply to pins VEXT 25 and VEXT 6 DB 37 female 37 pin connector AOUT0 GND 37 19 AGND AGND 36 18 AOUT0 AOUT1 35 17 AOUT1 GND AOUT2 GND 34 16 AGND AGND 33 15...

Page 12: ...UT6 AOUT7 26 8 AOUT7 GND VEXT 140mA fused 25 7 AGND AGND 24 6 VEXT 140mA fused AGND 23 5 AGND DIO2 22 4 DIO1 AGND 21 3 DIO0 15V 20mA OUT 20 2 15V 20mA OUT 1 AGND DNx PC 913 Ext PWR 37 19 Ext PWR DGND 36 18 45V DGND 35 17 45V DGND 34 16 45V DGND 33 15 45V DGND 32 14 45V DGND 31 13 45V DGND 30 12 45V DGND 29 11 N C DGND 28 10 N C DGND 27 9 N C DGND 26 8 45V DGND 25 7 45V DGND 24 6 45V DGND 23 5 45V ...

Page 13: ...jumpers place jumpers as shown in Figure 1 6 Figure 1 6 Diagram of AO 308 353 Board Position Jumper Settings DNA 120 pin Bus Connector DB 37 I O Connector Power Connector Factory Use Only External Circuits 16 J1 15 2 1 8 6 4 3 5 7 14 13 12 11 10 9 See Figure 1 5 for jumper locations for setting board position Layer s Position as marked on the Faceplate I O 1 I O 2 I O 3 I O 4 I O 5 I O 6 Jx Pins 9...

Page 14: ... and commented code that can be compiled and executed 2 1 1 Creating a Session The Session object controls all operations on your PowerDNA device Therefore the first task is to create a session object by entering CUeiSession session 2 1 2 Configuring the Channels Framework uses resource strings to select which device subsystem and channels you use within a session The resource string syntax is sim...

Page 15: ...owing sample code shows how to create a scaled writer object and write a sample Create a reader and link it to the session s stream CueiAnalogScaledWriter writer session GetDataStream write one scan the buffer must contain one value for each channel double data 2 0 0 0 0 writer WriteSingleScan data Similarly you can create a raw writer object by entering the following Create a reader and link it t...

Page 16: ... DqAcbInitOps functions Not all configuration bits apply to DNA AO 308x series AO 308 AO 308 350 AO 308 353 AO 308 420 boards however The following bits make sense define DQ_FIFO_MODEFIFO 2L 16 continuous acquisition with FIFO define DQ_LN_MAPPED 1L 15 For WRRD DMAP devices automatically selected define DQ_LN_STREAMING 1L 14 For RDFIFO devices stream the FIFO data automatically selected For WRFIFO...

Page 17: ...e use define DQ_AO308_MODEFIFO 1L 19 continuous output with FIFO define DQ_AO308_MODECONT 2L 19 waveform mode continuous define DQ_AO308_MODECYCLE 3L 19 waveform mode regenerate define DQ_AO308_MODEWFGEN 4L 19 waveform mode hardware DQ_LN_ENABLE enables all operations with the DQ_LN_CVCKSRC0 selects the internal channel list clock CL source as a timebase AO 308 supports CV clock DQ_LN_ACTIVE is ne...

Page 18: ...llowing formula Raw Volt Offset Span 0xFFFF where Volt is the desired level in volts To convert current into A D representation AO 308 420 only use the following formula Raw mA Offset Span 0xFFFF where mA is the desired level in mA Bit Name Purpose Comments 31 LNCL_NEXT Tells firmware that there is a next entry n the channel list 21 DQ_LNCL_UPDALL Check update line to update all DACs Reserved 20 D...

Page 19: ...ions Every write to the channel takes approximately 3 3µs Thus execution time for this function depends on the number of channels in the channel list 3 5 Using the Board in ACB Mode This is a pseudo code example that highlights the sequence of functions needed to use ACB on the 308x boards A complete example with error checking can be found in the directory SampleACB30x Note that we use the define...

Page 20: ...ll the function DqAcbInitOps bcb Config 0 TrigSize NULL pDQSETTRIG TrigMode fCLClk 0 float fCVClk CLSize CL 0 uint32 ScanBlock acb printf Actual clock rate f n fCLClk Now set up events DqeSetEvent bcb DQ_eFrameDone DQ_ePacketLost DQ_eBufferError DQ_eP acketOOB Allocate data buffer datta dquser_allocatebuffer Pre fill ACB with raw data dquser_prefillbuffer data DqAcbPutScansCopy bcb data buffer buf...

Page 21: ...cans while keep_looping DqeWaitForEvent bcb 1 FALSE EVENT_TIMEOUT events if events DQ_eFrameDone fill buffer with more data dquser_prefillbuffer data DqAcbPutScansCopy bcb data buffer bufsize buffer size MINRQ minimum size size actual copied size from user buffer into ACB avail available free space in buffer STEP 5 Stop operation DqeEnable FALSE bcb 1 FALSE STEP 6 Clean up DqAcbDestroy bcb DqStopD...

Page 22: ...sub connector Used to connect the AO 308 353 board to a 37 terminal panel such as the DNA STP 37 DNA STP 37 This is a 37 way screw terminal panel that can be used for making external connections to the AO 308 353 board and DNA CBL 37 cable NOTE If the total power consumption of the board exceeds 4 5W a rear mount cooling fan such as the DNA FAN5 for 3 Cube or DNA FAN8 for 5 Cube should be added to...

Page 23: ... Level API 8 J Jumper Settings 7 M Manual Conventions 2 Manual Organization 1 P Photo of DNA AO 308 353 layer 4 Physical layout 7 Programming ACB Mode 13 Channel List Settings 12 Commands and Parameters 13 Configuration Settings 10 Configuring Channels 8 Configuring the Timing 8 Creating a Session 8 Data Representation 12 Low Level AP 10 Writing Data 9 S Screw terminal panels 16 settings clock 11 ...

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