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Doc. No: Unex-QSG-21-003

 

 

 

 

8/23

 

A printed version of this document is an uncontrolled copy

 

© 2021 Unex Technology Corporation – Company Confidential

 

Parameters 

Conditions 

Min. 

Typ.  Max.  Unit 

mPCIe 1PPS (P49) tolerance 

Accuracy/Bias 

-100 

100 

ns 

Precision/Jitter 

-30 

30 

ns 

Pulse width 

15 

ns 

V2X sensitivity 

PER 

≤ 10% 

-92 

dBm 

PER 

≤ 10%, 

-40 - +85 °C 

-82 

dBm 

V2X maximum input level 

PER 

≤ 10% 

-30 

dBm 

V2X adjacent channel rejection   

-

 

13 

dB 

V2X non-adjacent channel rejection 

-

 

29 

dB 

V2X output power 

Spectrum mask 

Class C 

-

 

20 

dBm 

GNSS sensitivity 

Tracking 

-162 

-125 

dBm 

GNSS LNA bias 

I

LNA

 

≤ 20mA 

3.0 

3.3 

GNSS maximum total external gain 

Gain/loss combined 

24 

dB 

Note:   

*1: UART = UART_RX(mPCIe P17)/UART_TX(mPCIe P19)/RXD(Molex P2)/TXD(Molex P3)   
*2: TRIGGER_SW (SW1.7) = ON 
*3: TRIGGER_SW (SW1.7) = OFF 
*4: IOL = Low level output current (UART_TX) 
*5: IOH = High level output current (UART_TX) 

7.3. 

Power Consumption 

SOM-301(v2)/SOM-351 can be powered in three different ways: dual voltage (5V/3.3V), 

external cable (5V/3.3V), and single voltage (3.3V). The data listed in table 3, 4, and 5 serve 

only as a reference for system integrators. The actual conditions will vary depending on 

FW version and user applications. 

Table 3. Dual voltage power consumption   

Condition 

Power Consumption (A)   

Temp. 

Power Source 

Voltage (V) 

Low 

*1

 

Typical 

*2

 

High 

*3

 

25°C 

5V 

*4

 

0.34 

0.40 

2.0 

3.3 Vaux 

*5

 

3.3 

0.100   

0.105   

0.110   

85°C 

5V 

*4

 

0.38   

0.44   

2.0   

3.3 Vaux 

*5

 

3.3 

0.105   

0.110 

0.115   

Note:   

*1: CPU idle and V2X stack loaded.   
*2: CPU 50% and V2X transmitting 400 bytes at 20dBm every 100ms. 
*3: Hardware upper limit. 
*4: From mini PCIe 5V (pin 3, 5, 45, 47) 
*5: From mini PCIe 3.3 Vaux (pin 2, 24, 39, 41, 52) 

Summary of Contents for SOM-300 Series

Page 1: ...5 stack 0A1 0A2 SOM 301U v2 V2X mPCIe System On Module V2Xcast WAVE stack 0A1 0A2 SOM 351 V2X mPCIe System On Module 0A1 0A2 SOM 351E V2X mPCIe System On Module V2Xcast C V2X stack Europe 0A1 0A2 SOM 351U V2X mPCIe System On Module V2Xcast C V2X stack USA 0A1 0A2 Reviewers Department Name Acceptance Date Note PD Nidor Huang 2021 10 06 RD JY Ou 2021 10 13 Modification History Revision Date Originat...

Page 2: ...n 8 8 I O Interfaces 9 8 1 Antenna Connectors 9 8 2 Mini PCIe Card Pinout 11 8 3 I O Cable Pinout 12 8 4 DIP Switch 13 9 Design in Guidelines 15 9 1 Power Line Traces 15 9 2 Power Sequence 15 9 3 Brown Out 16 9 4 Grounding 16 9 5 USB Data Lines 16 9 6 Serial Port 17 9 7 Reset 17 9 8 1PPS 17 9 9 Tamper Detection Optional 19 9 9 1 Production Mode 20 9 9 2 Test Mode 20 9 10 Thermal Management 20 10 D...

Page 3: ...uting example 17 Figure 8 External 1PPS input pins 19 Figure 9 Thermally conductive pad area 21 Figure 10 SOM 301 v2 SOM 351 dimensions 22 LIST OF TABLES Table 1 Absolute maximum ratings 7 Table 2 Recommended operating conditions 7 Table 3 Dual voltage power consumption 8 Table 4 External cable power consumption 9 Table 5 Single voltage power consumption 9 Table 6 SOM 301 v2 SOM 351 mini PCIe row ...

Page 4: ...rporation selling the product warrants that commencing from the date of shipment to customer and continuing for a period of twelve 12 months This limited warranty extends only to the original customer of the product Customer s sole and exclusive remedy and the entire liability of Unex under this limited warranty will be at Unex s option return for repair to Unex s repair center with freight and in...

Page 5: ...equest of the Customer Customized and original design manufacturer ODM products The warranty terms for customized and ODM products should be defined in the contract that governs the project 4 Safety Guidelines Keep working area clean and dry while assembling installing When operating under extreme temperature conditions environmental control measures e g heating cooling should be considered Make s...

Page 6: ...A printed version of this document is an uncontrolled copy 2021 Unex Technology Corporation Company Confidential Figure 1 SOM 301 v2 SOM 351 series appearance 6 Functional Block Diagram Figure 2 Functional block diagram TOP BOTTOM ...

Page 7: ...d outside the Recommended Operating Conditions but within the Absolute Maximum Ratings the device may not be fully functional and this may affect device reliability functionality performance and shorten the device lifetime 2 All voltages are with respect to network GND 7 2 Recommended Operating Conditions Over operating free air temperature range unless otherwise noted Table 2 Recommended operatin...

Page 8: ...XD Molex P3 2 TRIGGER_SW SW1 7 ON 3 TRIGGER_SW SW1 7 OFF 4 IOL Low level output current UART_TX 5 IOH High level output current UART_TX 7 3 Power Consumption SOM 301 v2 SOM 351 can be powered in three different ways dual voltage 5V 3 3V external cable 5V 3 3V and single voltage 3 3V The data listed in table 3 4 and 5 serve only as a reference for system integrators The actual conditions will vary ...

Page 9: ...2 Table 5 Single voltage power consumption Condition Power Consumption A Temp Power Source Voltage V Low 1 Typical 2 High 3 25 C 3 3 Vaux 4 3 3 0 60 0 70 3 0 85 C 3 3 Vaux 4 3 3 0 70 0 77 3 0 Note 1 CPU idle and V2X stack loaded 2 CPU 50 and V2X transmitting 400 bytes at 20dBm every 100ms 3 Hardware upper limit 4 From mini PCIe 3 3 Vaux pin 2 24 39 41 52 8 I O Interfaces 8 1 Antenna Connectors The...

Page 10: ...cting cables between the module and the antenna must have 50 Ω impedance If the impedance of the module is mismatched RF performance will be reduced significantly Please be careful when extracting the antenna cable from the SOM 301 v2 SOM 351 Extracting the connector by pulling the cable may cause damage on the antenna plug assembly It is recommended to extract the cable using extraction tool like...

Page 11: ...he mPCIe connector Please note that the I O directions listed here are on the SOM 301 v2 SOM 351 side For designing a system board mPCIe interface the input and output direction must be reversed Table 6 SOM 301 v2 SOM 351 mini PCIe row 0 pinout Pin Symbol Type Level V Description Note 1 NC Not connected 3 5V P 5 5V 2A power input Proprietary 5 5V P 5 5V 2A power input Proprietary 7 NC Not connecte...

Page 12: ...ound 6 NC Not connected 8 NC Not connected 10 NC Not connected 12 NC Not connected 14 NC Not connected 16 NC Not connected KEY Mechanical key 18 GND G Ground 20 NC Not connected 22 PERST I PU 3 3 CRATON2 reset 2KΩ PU active LOW Signal rising edge 0 1 will reset mPCIe module 24 3 3 Vaux P 3 3 Powered by 5V 115mA max Powered by 3 3 Vaux 3000mA max 26 GND G Ground 28 NC Not connected 30 NC Not connec...

Page 13: ... P 5 5V power Internally tied with mPCIe 5V pins J1 2 RXD I 3 3 UART RXD PU Internally tied with mPCIe P17 J1 3 TXD O 3 3 UART TXD PU Internally tied with mPCIe P19 J1 4 EX_RSTn I 3 3 CRATON2 reset PU Internally tied with mPCIe P22 J1 5 1PPS I 3 3 1PPS PU Internally tied with mPCIe P49 J1 6 TAMPER I 3 3 Active LOW Internally tied with mPCIe P51 J1 7 GND G Ground The 7 pin cable connector is Molex ...

Page 14: ...and to keep 5V power from damaging your system board it is important to set the DIP switch to correct positions before connecting the I O cable Switching of internal external GNSS and 1PPS signal is not controlled by DIP switch Please see 9 8 1PPS for detailed instruction Table 9 DIP Switch Functions Position Name ON Function OFF Function SW1 1 5V_SW 5V power from mPCIe 5V power from cable SW1 2 R...

Page 15: ...Power Line Traces Power line traces should be as wide as possible in order to reduce impedance of these lines Crossing by any other lines of upper or lower layer should also be avoided The maximum power consumption occurs during RF transmission A typical transmitting frame lasts 1 2ms It is recommended to keep the 5V supply current no less than 2A continuous to keep RF performance from degradation...

Page 16: ...pecification and can be used for control and data transfers as well as for diagnostic monitoring and firmware update The USB port is typically the main interface between the SOM 301 v2 SOM 351 mPCIe module and OEM hardware Since the USB_D and USB_D signals have a clock rate of 240 MHz the signal traces must be routed carefully Minimize trace lengths number of vias and capacitive loading The layout...

Page 17: ...ART is 3 3V TTL logic level Depending on the design of serial port on the OEM hardware a level translator circuit might be needed to make the system operate properly e g 5V to 3 3V or 1 8V to 3 3V The only configuration that does not need level translation is the 3 3V UART 9 7 Reset The reset pin PERST P22 is low active and will reboot Linux when a rising edge of input voltage end of assertion is ...

Page 18: ...ilure of the external GNSS module If this happens you may need choose one of the following three solutions 1 Add a 3KΩ PD resistor on the motherboard side The internal PU resistance of SOM 301 v2 SOM 351 is 32KΩ 60KΩ Ohm 2 Delay the boot up of external GNSS module for 200ms until SOM 301 v2 SOM 351 boot up completed 3 Pull low the PERST EX_RSTn signal during power up and then release or pull high ...

Page 19: ...allows enabling the tamper detection mechanism Calling this API will move tamper HW state from the testing mode to the production mode Once called it cannot move back to the testing mode The source and trigger mode of tamper detection signal can be selected with the DIP switch on SOM 301 v2 SOM 351 position SW1 6 and SW1 7 Tamper detection pins are exposed in both mPCIe interface pin 51 and I O ca...

Page 20: ... response provides protection against tamper attempts while the chip is in sleep mode state When it is enabled any previously latched tamper event during sleep mode will trigger the zeroization sequence upon power up Enabling this mode is done by invoking the Enable standby mode tamper response service API 9 9 2 Test Mode In test mode the SOM 301 v2 SOM 351 will not erase the CSP critical security...

Page 21: ... side is needed to avoid component interference It is also recommended to reserve 13mm as total height limitation Please refer to PCI Express Mini Card Electromechanical Specification 2 0 2 1 for more detailed guidelines It is recommended to use a mini PCIe connector with 4mm stack height leaving 1 5mm space between the SOM 301 v2 SOM 351 PCB and the system board This space can later be filled wit...

Page 22: ...s Table 10 Dimensions and weight Model Length mm Width mm Height mm Weight g SOM 301 v2 SOM 351 51 0 38 5 11 5 21 2 10 1 Component Keep Out Area Maximum height of bottom side components may reach 1 0mm In order to avoid interference with SOM 301 v2 SOM 351 the system board side component height should be carefully considered according to the datasheet of mPCIe connector selected ...

Page 23: ... integration of SOM 301 v2 SOM 351 with a Linux host system a user needs to follow the steps below 1 Check if the RNDIS driver has already been installed on the host system If it has not been installed yet install the RNDIS driver for the host system The driver installation might include loading rndis_host ko with modprobe command or enabling CONFIG_USB_NET_RNDIS_HOST when compiling the Linux kern...

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