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HARDWARE ARCHITECTURE
SYNTH1000 series boards are comprised of a digital section and an analog section. The digital
section includes a high speed programmable logic device which implements the PCI interface and
embedded firmware for controlling the DDS cores of the analog section. The analog section contains a
3.5GHz low-jitter clock, and two AD9914 single-chip Direct Digital Synthesizer (DDS) ICs. The current
outputs of each DDS are fed, via a broadband RF transformer and a 900MHz low-pass filter, to two
SMA jacks.
SYNTHESIZER A & B OUTPUTS (DDS A OUT, DDS B OUT)
The two analog synthesizer outputs are provided on SMA connectors with amplitude (nominally 0-
450mV RMS into 50 ohms). The frequency, phase, amplitude, frequency sweep rate (if specified), and
other parameters are software programmable.
TTL0-TTL5 PROFILE SELECT INPUT LINES
The external TTL input pod is connected to the Synth1000x2 board via a 26-pin cable, and the
interface is used for external profile selection inputs in external profile mode and as ramping controls in
external ramp mode. TTL 0-2 control profiles for SynthA and TTL 3-5 control profiles for SynthB on the
board.
EXTERNAL REFERENCE CLOCK INPUT LINE
The SMA jack labeled GC_P on the external TTL input pod may be optionally used for an external
clock input, if desired. This external clock, which may be any frequency between 10 and 50MHz can
make it easier to sync multiple synth1000x2 devices together in a multi-board system. The labview
interface currently supports a 10mhz external clock, if another frequency is required additional steps
are needed.
EXTERNAL RAMP MODE
The external TTL input pod can also function to control the sweep. External Ramp mode enables
hardware ramp direction change (on TTL 0,3 for synth A/B), hardware ramp pause (on TTL 1,4 for
synth A/B) and OSK (on TTL 2,5 for synth A/B, currently untested).
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Summary of Contents for SYNTH1000x2
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