Chapter 4: Getting Started
Planning the Timing
Part No. 24001157
VersaMux-4000 Operation & Installation Guide
Page 4-19
Revision C
Port Timing, VersaMux = DCE
shows the VersaMux-4000 in DCE mode and receiving its master clock
from one of its ports. The VersaMux uses the system reference (
ClkRef
) to
generate the DCE Tx Clock (Transmit Signal Element Timing- DCE Source) and Rx
Clock (Receiver Signal Element Timing- DCE Source) signals. With the
TxClkSrc
set
to
TxClkIn
, the VersaMux uses the Tx Clock signal from the DTE (Transmit Signal
Element Timing- DTE Source) to clock the Transmitted Data in from the DTE.
Typically the DTE would use the VersaMux DCE Tx Clock or DCE Rx Clock to
generate its system reference.
Figure 4-24
VersaMux-4000, DCE Mode, Port Timing, TxClkSrc = TxClkIn
TxClkSrc
set to
System
,
the VersaMux uses its system reference to clock the Transmitted Data in from the
DTE.
Figure 4-25
VersaMux-4000, DCE Mode, Port Timing, TxClkSrc = System
DTE Device
ClkRef
NRZ Interface
Transmitted Data
Tx Clock (DCE)
Tx Clock (DTE)
Rx Clock (DCE)
Rx Data
Primary
Reference Source
(PRS)
VersaMux-4000 (DCE)
Mode = DCE
ClkRef = Port (Port-1, Port-2, Port-3, Port-4)
TxClkSrc = TxClkIn
Port Interfaces
Mode = DCE
ClkRef = Port (Port-1, Port-2, Port-3, Port-4)
TxClkSrc = System
DTE Device
ClkRef
NRZ Interface
Transmitted Data
Tx Clock (DCE)
Tx Clock (DTE)
Rx Clock (DCE)
Rx Data
Primary
Reference Source
(PRS)
VersaMux-4000 (DCE)
Port Interfaces