Planning the Timing
Chapter 4: Getting Started
Page 4-14
VersaMux-4000 Operation & Installation Guide
Part No. 24001157
Revision C
is similar to the one in
except that the
VersaMux-4000
TxClkSrc
parameter is set to
System
.
The VersaMux-4000 uses the Rx Clock DCE signal from the DCE device (Receiver
Signal Element Timing- DCE Source) as the source signal to clock the Transmitted
Data out to the DCE. In addition, the VersaMux-400 uses this source to generate
the Tx Clock DTE signal to the DCE (Transmit Signal Element Timing- DTE Source).
Figure 4-15
VersaMux-4000 (DTE) Network Timing Clocking Out Data with the System Clock
Aggregate Timing, VersaMux = DCE
When the VersaMux-4000, in DCE Mode, connects to a Trunk Encryption Device
(TED), or any other DTE device, it needs to ensure that the TxData (Transmitted
Data) and Tx Clock In (Transmit Signal Element Timing- DTE Source) signals from
the DTE are in phase.
NOTE:
If the DCE mode VersaMux-4000, set to aggregate timing, loses the Tx Clock In
signal it will default the clock reference source to the internal oscillator.
illustrates a typical timing configuration where the DCE VersaMux-
4000 recovers its master clock from the DTE Tx Clock (Transmit Signal Element
Timing - DTE Source) on the aggregate interface (
ClkRef
parameter set to
Aggregate
). It uses the Tx Clock signal from the DTE device (Transmit Signal
Element Timing- DTE Source) to clock in the Transmitted Data (
TxClkSrc
parameter set to
TxClkIn
).
Figure 4-16
VersaMux-4000 in DCE Mode, Aggregate Timing, TxClkSrc = TxClkIn
DCE Device
(IE: Satellite
Modem)
ClkRef
NRZ Interface
Transmitted Data
Tx Clock (DCE)
Tx Clock (DTE)
Rx Clock (DCE)
Rx Data
Primary
Reference
Source (PRS)
VersaMux-4000 (DTE)
Mode = DTE
ClkRef = Aggregate
TxClkSrc = System
Port Interfaces
DTE Device
(IE: Crypto)
ClkRef
NRZ Interface
Transmitted Data
Tx Clock (DCE)
Tx Clock (DTE)
Rx Clock (DCE)
Rx Data
Primary
Reference
Source (PRS)
VersaMux-4000 (DCE)
Mode = DCE
ClkRef = Aggregate
TxClkSrc = TxClkIn
Port Interfaces
