Ublox SARA-N210, System Integration Manual

Page: 57 / 82

SARA-N2 series - System Integration Manual
UBX-17005143 - R06 Design-in Page 57 of 82
2.13 Design-in checklist
2.13.1 Schematic checklist
The following are the most important points for a simple schematic check:
 DC supply must provide a nominal voltage at VCC pin above the minimum operating range
limit.
 DC supply must be capable of providing, at VCC pins, the specified average current during a
transmission at maximum power with a voltage level above the minimum operating range
limit.
 VCC supply should be clean, with very low ripple/noise.
 Do not apply loads which might exceed the limit for maximum available current from V_INT
supply.
 Check that voltage level of any connected pin does not exceed the relative operating range.
 Capacitance and series resistance must be limited on each SIM signal to match the SIM
specifications.
 Insert the suggested capacitors on each SIM signal and low capacitance ESD protections if
accessible.
 Check UART signals direction, since the signal names follow the ITU-T V.24
Recommendation [5] .
 Provide accessible testpoints directly connected to the following pins: TXD, RXD, GPIO1, V_INT
and RESET_N for diagnostic purpose.
 Provide proper precautions for ESD immunity as required on the application board.
 Any external signal connected to the UART interface pin must be tri-stated or set low before
applying VCC supply, to avoid latch-up of circuits and let a proper boot of the module.
 Any external signal connected to any generic digital interface pin (GPIO, I2C) must be tri-stated
or set low when the module is in not-powered mode and during the module power-on sequence
(at least until the activation of the V_INT output), to avoid latch-up of circuits and let a proper
boot of the module.
 All unused pins can be left unconnected.
2.13.2 Layout checklist
The following are the most important points for a simple layout check:
 Check 50  nominal characteristic impedance of the RF transmission line connected to the
ANT pad (antenna RF input/output interface).
 Follow the recommendations of the antenna producer for correct antenna installation and
deployment (PCB layout and matching circuitry).
 Ensure no coupling occurs between the RF interface and noisy or sensitive signals (like SIM
signals and high-speed digital lines).
 VCC line should be wide and short.
 Route VCC supply line away from sensitive analog signals.
 Ensure proper grounding.
 Optimize placement for minimum length of RF line and closer path from DC source for VCC.
 Keep routing short and minimize parasitic capacitance on the SIM lines to preserve signal
integrity.