Ublox MPCI-L1 series, System Integration Manual, Page: 12 / 90

TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04 Advance Information System description
Page 12 of 90
Function Pin Name Pin No I/O Description Remarks
SIM VSIM
59 O SIM supply output
VSIM
= 1.8 V / 3 V automatically generated according to
the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO 57 I/O SIM data Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k
Ω
pull-up to
VSIM
.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
56 O SIM clock 5 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
58 O SIM reset Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
USB USB_D-
27 I/O USB Data Line D- USB interface for AT commands, Data communication,
FOAT, FW update by u-blox tool and diagnostic.
90
Ω
nominal differential impedance (Z
0
)
30
Ω
nominal common mode impedance (Z
CM
)
Pull-up or pull-down resistors and external series resistors
as required by the
USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D+ 28 I/O USB Data Line D+ USB interface for AT commands, Data communication,
FOAT, FW update by u-blox tool and diagnostic.
90
Ω
nominal differential impedance (Z
0
)
30
Ω
nominal common mode impedance (Z
CM
)
Pull-up or pull-down resistors and external series resistors
as required by the
USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
GPIO GPIO1
21 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO2
22 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO3
24 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO4
25 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO5
60 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO6 61 I/O GPIO 1.8 V GPIO by default configured as pad disabled.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
Reserved RSVD 1, 4, 6-19, 26,
29, 31, 33-43,
45, 47-55,
62-68, 75, 77,
84, 91 N/A RESERVED pin Leave unconnected.
See section 2.9
Table 3: TOBY-L100 module pin definition, grouped by function