TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04
Advance Information
System description
Page 23 of 90
Figure 10 shows TOBY-L1 module power-on sequence from power-off mode, describing the following phases:
•
The
PWR_ON
input is set low, representing the start-up event.
•
All the module digital pins are held in tri-state until all the internal LDO voltage regulators are turned on.
•
The internal reset signal is held low: the baseband core and all the digital pins are held in reset state.
•
When the internal reset signal is released, the configuration of the module interfaces starts: any digital pin is
set in a proper sequence from the reset state to the default operational configured state. The duration of
this pins’ configuration phase differs within generic digital interfaces and the USB interface due to specific
host / device enumeration timings.
•
The
PWR_ON
input can be released to the high logical level after at least 5 seconds.
•
The module is fully ready to operate after all interfaces are configured.
VCC
V_BCKP
RESET_N
PWR_ON
V_INT
Internal Reset
System State
Digital Pins State
Operational
OFF
Tristate
Internal Reset
Internal Reset
→
Operational
ON
Start-up
event
Start of interface
configuration
PWR_ON
can be set high
0 ms
~6 ms
5 s
~5 ms
~20 s
All interfaces
are configured
Figure 10: TOBY-L1 power-on sequence description
The Internal Reset signal is not available on a module pin, but the application can monitor the
V_INT
pin
to sense start of the TOBY-L1 series module power-on sequence.
Before switching on the generic digital interface supply source (
V_INT
) of the module, no voltage driven
by an external application should be applied to any generic digital interface of the module.
Before a TOBY-L1 series module is fully ready to operate, the host application processor should not send
any AT command over the AT communication interface (USB) of the module.
