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Error! No text of specified style in document. - System Integration Manual 

CDMA-2X-11004-P1 

Objective Specification 

Design-In  

 

 

Page 67 of 79 

 

A series ferrite bead (e.g. Murata BLM15HD182SN1) must be added on the line connected to 
the Reset_N  pin to avoid a module reset caused by an electrostatic discharge applied to the 

application board enclosure 

 

It is recommended to keep the connection line to Reset_N  as short as possible 

 

u-blox C200

HW_SHUTDOWN

Reset     

push button

ESD

Open 
Drain 
Output

Application 

Processor

u-blox C200

HW_SHUTDOWN

FB1

C1

FB2

C2

 

Figure 19: HW_SHUTDOWN application circuits for ESD immunity test 

Summary of Contents for LISA-C200

Page 1: ...s document describes the features and the integration of u blox LISA C200 and FW75 CDMA2000 1xRTT wireless modules These modules are complete and cost efficient CDMA solutions offering 153 kb s data s...

Page 2: ...document contains target values Revised and supplementary data will be published later Advance Information This document contains data based on early testing Revised and supplementary data will be pub...

Page 3: ...lox makes no warranties based on the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without not...

Page 4: ...configure these u blox wireless modules This manual has a modular structure It is not necessary to read it from the beginning to the end The following symbols are used to highlight important informati...

Page 5: ...rror No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Preface Page 5 of 79 A short description of the application Your complete contact details...

Page 6: ...Serial communication 40 40 4 1 Serial interfaces configuration 40 40 4 2 Asynchronous serial interface UART 41 40 4 3 USB interface 44 49 1 1 MUX Protocol 3GPP 27 010 48 49 2 Reserved pins RSVD 48 49...

Page 7: ...9 74 3 1 General precautions 66 89 1 1 Antenna interface precautions 72 89 1 2 Module interfaces precautions 72 90 Features description 73 90 1 Firmware upgrade Over The Air FOTA 73 90 2 TCP IP 73 90...

Page 8: ...stem description 1 1 Overview u blox C200 wireless modules integrate a complete CDMA 1xRTT 153 kb s packet data modem into a single module solution These modems are certified to operate on US CDMA car...

Page 9: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 9 of 79 2 3G CDMA 2000 1xRTT Characteristics...

Page 10: ...yle in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 10 of 79 2 3G CDMA 2000 1xRTT Characteristics 3 CDMA Terrestrial Radio Access Frequency Divis...

Page 11: ...ied style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 11 of 79 2 3G CDMA 2000 1xRTT Characteristics 4 Dual band support Band Class 0 US Cellu...

Page 12: ...odem for embedded solutions Data communication is through 2 data interfaces 5 wires UART and Full Speed USB The interfaces are intended to support a vast quantity of AT commands that will enable easy...

Page 13: ...connected to the Diplexer which separates the 800 and 1900 MHZ bands Each 800 1900 MHz RF chain are connected to their respective transceiver paths via duplexers as shown in prior block diagram Each...

Page 14: ...integrates Microprocessor for controller functions CDMA upper layer software ARM9 coprocessor and HW accelerator for CDMA Layer 1 control software and routines Dedicated HW for peripherals control as...

Page 15: ...detect input Input for VBUS 5 V typical USB supply sense USB_D All USB I O USB Data Line D 90 nominal differential impedance Pull up or pull down resistors and external series resistors as required b...

Page 16: ...UIM clock Value at internal reset L SIM_IO All SIM I O SIM UIM data Internal 4 7 k pull up resistor to VSIM Value at internal reset L PD SIM_RST All SIM O SIM UIM reset Value at internal reset L VSIM...

Page 17: ...This is achieved by hardware design utilizing a power efficient circuit topology Figure 2 and by power management software controlling the module s power saving mode Baseband Processor Switching Step...

Page 18: ...through the VCC pins by a DC power supply Voltages must be stable during operation the current drawn from VCC can vary by some orders of magnitude Name Description Remarks VCC Module power supply inp...

Page 19: ...7 V Linear LDO Regulator Main Supply Voltage 5 V Switching Step Down Regulator No portabledevice No less than 5 V Yes greater than 5 V Yes alwaysavailable Figure 3 VCC supply concept selection The sw...

Page 20: ...f delivering the peak current due to high internal resistance Keep in mind that the use of batteries requires the implementation of a suitable charger circuit not included in Error No text of specifie...

Page 21: ...e and PFM PWM mode transitions must be avoided to reduce the noise on the VCC voltage profile Switching regulators able to switch between low ripple PWM mode and high efficiency burst or PFM mode can...

Page 22: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 22 of 79 6 Reference 7 Description 8 Part Number Manufacturer...

Page 23: ...2 4 MHz LT3972IMSE PBF Linear Technology Table 4 Suggested components for the VCC voltage supply application circuit using a step down regulator Low Drop Out LDO linear regulator The characteristics...

Page 24: ...Manual CDMA 2X 11004 P1 Objective Specification System description Page 24 of 79 5V C1 R1 IN OUT ADJ GND 1 2 4 5 3 C2 R2 R3 U1 SHDN u blox C200 VCC GND Figure 5 Suggested schematic design for the VCC...

Page 25: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 25 of 79 11 Reference 12 Description 13 Part Number Manufacturer...

Page 26: ...ument System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 26 of 79 11 Reference 12 Description 13 Part Number Manufacturer 14 C1 15 10 F Capacitor Ceramic X5R 06...

Page 27: ...ument System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 27 of 79 11 Reference 12 Description 13 Part Number Manufacturer 17 C2 18 10 F Capacitor Ceramic X5R 06...

Page 28: ...document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 28 of 79 11 Reference 12 Description 13 Part Number Manufacturer 20 R1 21 47 k Resistor 0402 5 0 1...

Page 29: ...document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 29 of 79 11 Reference 12 Description 13 Part Number Manufacturer 23 R2 24 4 7 k Resistor 0402 5 0 1...

Page 30: ...document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 30 of 79 11 Reference 12 Description 13 Part Number Manufacturer 26 R3 27 2 2 k Resistor 0402 5 0 1...

Page 31: ...be capable of delivering 1 2 A to the VCC pins and must be capable of delivering a DC current greater than the module maximum average current consumption at the VCC pins The maximum pulse and the max...

Page 32: ...ription Page 32 of 79 Figure 6 shows the complete configuration but the mounting of each single component depends on the application design 3 6V C1 GND C2 u blox C200 VCC VCC VCC VCC VCC LISA C200 FW7...

Page 33: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 33 of 79 32 Reference 33 Description 34 Part Number Manufacturer...

Page 34: ...in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 34 of 79 32 Reference 33 Description 34 Part Number Manufacturer 35 C1 36 22 F Capacitor Ceramic...

Page 35: ...Specification System description Page 35 of 79 32 Reference 33 Description 34 Part Number Manufacturer 38 C2 39 100 nF Capacitor Ceramic X7R 0402 10 16 V 40 GRM155R61A104KA01 Murata Table 6 Suggested...

Page 36: ...in the 2G case In the worst scenario corresponding to a continuous transmission and reception at maximum output power approximately 250 mW or 24 dBm the current drawn by the module at the VCC pins is...

Page 37: ...operating range minimum limit 3 4 V starting from a voltage value lower than 2 25 V See LISA C200 Data Sheet 1 or the FW75 C200 Data Sheet 2 Provided that the PWR_ON pin is is permanently low when VCC...

Page 38: ...ins of the module are locked in tri state i e floating The power down tri state function isolates the module pins from its environment when no proper operation of the outputs can be guaranteed The mod...

Page 39: ...C200 AT Commands Manual 3 in this case an internal or software reset is performed causing an asynchronous reset of the baseband processor 40 3RF connection The ANT connector has 50 nominal characteris...

Page 40: ...ommands according to 3GPP TS 27 010 7 AT commands according to 3GPP TS 27 005 6 AT commands according to 3GPP TS 27 010 u blox AT commands For the complete list of supported AT commands and their synt...

Page 41: ...ne external voltage translators e g Maxim MAX13234E could be used to provide RS 232 5 lines compatible signal levels This chip translates the voltage levels from 1 8 V module side to the RS 232 standa...

Page 42: ...bled FW75 C200 Internal active pull up to V_INT 2 8 V interface LISA C200 Internal active pull up to V_INT 1 8 V interface RxD Received data Module data output Circuit 104 Received data in ITU T V 24...

Page 43: ...n be enabled by AT UPSV 2 The module is in idle mode until a high to low i e OFF to ON transition on the RTS input line will switch the module from idle mode to active mode in 20 ms The module will be...

Page 44: ...e application board Higher protection level can be achieved by mounting a very low capacitance i e less or equal to 1 pF ESD protection e g Tyco Electronics PESD0402 140 ESD protection device on the l...

Page 45: ...cation System description Page 45 of 79 to 90 differential signal integrity may be degraded if the PCB layout is not optimal especially when the USB signaling lines are very long u blox C200 VBUS D D...

Page 46: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 46 of 79 41 Reference 42 Description 43 Part Number Manufacturer...

Page 47: ...nt System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 47 of 79 41 Reference 42 Description 43 Part Number Manufacturer 44 D1 D2 D3 45 Very Low Capacitance ESD P...

Page 48: ...vide direct access to the lines for execution of firmware upgrade and for debug purpose 49 1 1 MUX Protocol 3GPP 27 010 Error No text of specified style in document modules have a software layer with...

Page 49: ...ctive Specification System description Page 49 of 79 49 3 Schematic for LISA C200 and FW75 C200 modules integration Figure 11 shows the integration an LISA C200 FW75 C200 modules into an application b...

Page 50: ...RTS CTS RI GND 3V6 22 F VCC 100nF FW75 C200 VCC VCC VCC VCC VBUS D D GND VUSB_DET USB_D USB_D GND 100nF GND ANT Antenna Connection FW75 U FL Connector LISA C200SMTPAD DTE FW75 2 8V LISA 1 8V USB2 0 Ho...

Page 51: ...ecified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification System description Page 51 of 79 UART FW75 C200 and LISA C200 pins use different voltage levels 1 8V LISA C...

Page 52: ...odifications The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by u blox could void the user s authority to operate the equ...

Page 53: ...V 24 Recommendation 4 Provide appropriate access to USB interface and or to UART RxD TxD lines and access to PWR_ON and or HW_SHUTDOWN lines on the application board in order to flash upgrade the modu...

Page 54: ...ual CDMA 2X 11004 P1 Objective Specification Design In Page 54 of 79 Consider No routing areas for the Data Module footprint Optimize placement for minimum length of RF line and closer path from DC so...

Page 55: ...ion Design In Page 55 of 79 50 1 2 Antenna checklist Antenna should have 50 impedance V S W R less than 3 1 recommended 2 1 on operating bands in deployment geographical area Follow the recommendation...

Page 56: ...ntennas 50 2 1 FW75 C200 modem connector Manufacturer Series Name Part No Specification Description Remarks Molex SlimStack 52991 0808 PS 54 167 002 Receptacle 80 pins 0 50mm pitch 4mm stacking height...

Page 57: ...ext of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 57 of 79 51 Manufacturer 52 Series Name 53 Part No 54 Specification 55 Description...

Page 58: ...ation 55 Description 56 Remarks 57 Molex 58 SlimStack 59 53916 0808 60 PS 54 167 002 61 Header 80 pins 0 50mm pitch 4mm stacking height 62 Website www molex com Drawing 539160208_sd pdf mechanical lan...

Page 59: ...text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 59 of 79 63 Manufacturer 64 Series No 65 Part No 66 Specification 67 Description 6...

Page 60: ...cification 67 Description 68 Remarks 69 Molex 70 73412 71 73412 0110 72 PS 73598 02 73 Microcoaxial RF 50 PCB Vertical Jack Receptacle SMT 1 25mm 049 Mounted Height 74 Website www molex com Drawing 73...

Page 61: ...ance 74 1 1 1 1 1 1 2 2nd 74 1 1 1 1 1 1 3 Mai n DC Sup ply 74 1 1 1 1 1 1 4 74 1 1 1 1 1 1 4 1 Ver y Imp ort ant VCC line should be wide and short Route away from sensitive analog signals 74 1 1 1 1...

Page 62: ...Cable or direct RF connectors are common options The integration normally requires the fulfillment of some minimum guidelines suggested by antenna manufacturer Patch like antenna better suited for in...

Page 63: ...nalyzer connect the antenna through a coaxial cable to the measurement device the S11 indicates which portion of the power is delivered to antenna and which portion is reflected by the antenna back to...

Page 64: ...wideband antenna Figure 17 S11 and S21 comparison between a 900 MHz tuned half wavelength dipole green purple and a penta band internal antenna yellow cyan The half lambda dipole tuned at 900 MHz is k...

Page 65: ...ntenna port comprises the antenna element and its interconnecting cable surfaces The applicability of the ESD test depends on the device classification as well the test on other ports or on interconne...

Page 66: ...ne HW_SHUTDOWN pin A 47 pF bypass capacitor e g Murata GRM1555C1H470JA01 have to be mounted on the line termination connected to the HW_SHUTDOWN pin to avoid a module reset caused by an electrostatic...

Page 67: ...line connected to the Reset_N pin to avoid a module reset caused by an electrostatic discharge applied to the application board enclosure It is recommended to keep the connection line to Reset_N as sh...

Page 68: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 68 of 79 75 Reference 76 Description 77 Remarks...

Page 69: ...pecified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 69 of 79 75 Reference 76 Description 77 Remarks 78 ESD 79 Varistor for ESD protection 80 CT...

Page 70: ...style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 70 of 79 75 Reference 76 Description 77 Remarks 81 C1 C2 82 47 pF Capacitor Ceramic C0G 0402 5 50 V...

Page 71: ...tyle in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Design In Page 71 of 79 75 Reference 76 Description 77 Remarks 84 FB1 FB2 85 Chip Ferrite Bead for Noise EMI Suppres...

Page 72: ...nna or its connecting cable are not provided with completely insulating enclosure to avoid air discharge up to 8 kV 8 kV to the whole antenna and cable surfaces the following precautions to ESD immuni...

Page 73: ...n u blox C200 AT Commands Manual 3 Multiple PDP contexts are supported The DTE can access these PDP contexts either alternatively through the physical serial port or simultaneously through the virtual...

Page 74: ...Digital Signal Processing DSR Data Set Ready DTE Data Terminal Equipment DTM Dual Transfer Mode DTR Data Terminal Ready EBU External Bus Interface Unit CDMA CODE Division Multiple Access FDD Frequenc...

Page 75: ...ervice PFM Pulse Frequency Modulation PMU Power Management Unit RF Radio Frequency RI Ring Indicator RTC Real Time Clock RTS Request To Send RXD RX Data SAW Surface Acoustic Wave SIM Subscriber Identi...

Page 76: ...RS Service description Stage 2 Release 1999 9 Universal Serial Bus Revision 2 0 specification http www usb org developers docs 10 I2C Bus Specification Version 2 1 Philips Semiconductors January 2000...

Page 77: ...Error No text of specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Revision history Page 77 of 79 91 Revision 92 Date 93 Name 94 Status Comments...

Page 78: ...specified style in document System Integration Manual CDMA 2X 11004 P1 Objective Specification Revision history Page 78 of 79 91 Revision 92 Date 93 Name 94 Status Comments 95 96 11 24 11 97 rcam 98...

Page 79: ...ox com Headquarters Europe Middle East Africa u blox AG Phone 41 44 722 74 44 E mail info u blox com Support support u blox com Asia Australia Pacific u blox Singapore Pte Ltd Phone 65 6734 3811 E mai...

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