Error! No text of specified style in document. - System Integration Manual
CDMA-2X-11004-P1
Objective Specification
System description
Page 31 of 79
11
Reference
12
Description
13
Part Number - Manufacturer
29
U1 30
LDO Linear Regulator ADJ 3.0 A
31
LT1764AEQ#PBF - Linear Technology
Table 5: Suggested components for VCC voltage supply application circuit using an LDO linear regulator
Rechargeable Li-Ion battery
Rechargeable Li-Ion batteries connected to the VCC pins should meet the following requirements:
Maximum pulse and DC discharge current: the rechargeable Li-Ion battery with its output
circuit must be capable of delivering 1.2 A to the VCC pins and must be capable of delivering
a DC current greater than the module maximum average current consumption to VCC pins.
The maximum pulse discharge current and the maximum DC discharge current are not always
reported in battery data sheets, but the maximum DC discharge current is typically almost
equal to the battery capacity in Amp-hours divided by 1 hour
DC series resistance: the rechargeable Li-Ion battery with its output circuit must be capable of
avoiding a VCC voltage drop greater than 250 mV during peak currents (Max Tx Power).
Primary (disposable) battery
The characteristics of a primary (non-rechargeable) battery connected to VCC pins should meet
the following requirements:
Maximum pulse and DC discharge current: the non-rechargeable battery with its output circuit
must be capable of delivering 1.2 A to the VCC pins and must be capable of delivering a DC
current greater than the module maximum average current consumption at the VCC pins. The
maximum pulse and the maximum DC discharge current is not always reported in battery data
sheets, but the maximum DC discharge current is typically almost equal to the battery capacity
in Amp-hours divided by 1 hour
DC series resistance: the non-rechargeable battery with its output circuit must be capable of
avoiding a VCC voltage drop greater than 250 mV during peak currents (Max Tx Power).
Additional recommendations for the VCC supply application circuits
To reduce voltage drops, use a low impedance power source. The resistance of the power supply
lines (connected to the VCC and GND pins of the module) on the application board and battery
pack should also be considered and minimized: cabling and routing must be as short as possible in
order to minimize power losses.
Three
3
or five
4
pins are allocated for VCC supply. Another seven pins are designated for GND
connection. Even if all the VCC pins and all the GND pins are internally connected within the
module, it is recommended to properly connect all of them to supply the module in order to
minimize series resistance losses.
The placement cermic capacitors on the VCC line on the main board close to the connector will
benefit operation.
To reduce voltage ripple and noise, place the following near the VCC pins:
100 nF capacitor (e.g Murata GRM155R61A104K) to filter digital logic noise from clocks and
data sources
22 µF capacitor (e.g. Murata GRM31CR60J226K) to supply local DC energy.
3
LISA-C200.
4
FW75.
