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DCache background scrubber
This feature allows the L1 Data Cache RAM to be corrected while idle.
Disabled
/ 40.0ns / 80.0ns / 160ns / 320ns / 640ns / 1.28u / 2.56u / 5.12u
/ 105.12u
CPU Spread Spectrum
This feature is used to configure CPU spread spectrum.
Disabled
/ Spread
SATA Spread Spectrum
This feature is used to configure SATA spread spectrum.
Disabled
/ Down Spread
PCIE Spread Spectrum
This feature is used to configure PCIE spread spectrum.
Disabled
/ Down Spread
SSE/SSE2 Instructions
This feature is used to enable the function of SSE/SSE2 instruction.
Disabled /
Enabled
System BIOS Cacheable
Enabling this option will cause the BIOS code from ROM to be copied on to the
much faster RAM at location F0000h-FFFFFh, thus increasing system
performance. However, if any program writes to this memory area, a system
error may result.
Disabled
/ Enabled
SLI Broadcast Aperture
Disabled /
Auto