April 23, 2019
transphormusa.com
TDHBG1200DC100_0v1
2
TDHBG1200DC100 User Guide
Warnings
TDHGB1200DC100 input/output specifications
High-voltage input/output: 400Vdc max
Auxiliary supply (J1): 10V min, 18V max
Logic inputs: nominal 0V-5V
Pulse-generation circuit: Vlo < 1.5V, Vhi > 3.0V
Direct connection to gate driver: Vlo < 0.8V, Vhi > 2.0V
SMA coaxial connectors
Switching frequency: configuration-dependent
Lower limit determined by peak inductor current
Upper limit determined by desired dead-time and power dissipation
Power dissipation in the GaN FET is limited by the maximum junction temperature. Refer to the TP65H070LxG datasheets.
Circuit description
The circuit comprises a simple half-bridge featuring 1 TP65H070LDG and 1 TP65H070LSG GaN FETs, as indicated in the block
diagram of Figure 3. Two high-voltage ports are provided which can serve as either input or output, depending on the
configuration—boost or buck. In either case one FET acts as the active power switch while the other carries the freewheeling
current. The latter device may be enhanced, as a synchronous rectifier, or not. With GaN FETs the reverse recovery charge is low
and there is no need for additional freewheeling diodes. Two input connectors are provided which can be connected to sources
of logic-level command signals for the hi/lo gate driver. Both inputs may be driven by off-board signal sources; or alternatively, a
single signal source may be connected to an on-board pulse-generator circuit which generates the two non-overlapping pulses.
Jumpers determine how the input signals are used.
An inductor is provided as a starting point for investigation. This is a 440µH toroid intended to demonstrate a reasonable
compromise between size and efficiency for power up to 1.2kW at a switching frequency of 100kHz.
