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600X CompactFlash Card

Transcend Information Inc.

V1.0

Output Drive Characteristics

Table 4: Output Drive Characteristics

Type

Parameter

Symbol

Conditions

MIN

TYP

MAX

Units

Output Voltage

Voh

Vol

Ioh = -4 mA

Iol = 4 mA

Vcc

-0.8V

Gnd

+0.4V

Volts

Output Voltage

Voh

Vol

Ioh = -4 mA

Iol = 4 mA

Vcc

-0.8V

Gnd

+0.4V

Volts

Output Voltage

Voh

Vol

Ioh = -4 mA

Iol = 4 mA

Vcc

-0.8V

Gnd

+0.4V

Volts

Tri-State Leakage

Current

Ioz

Vol = Gnd

Voh = Vcc

-10

Summary of Contents for TS16GCF600

Page 1: ...4 1 Complaint RoHS compliant products Single Power Supply 3 3V 5 or 5V 10 Operating Temperature 25 o C to 85 o C Storage Temperature 40 o C to 85 o C Operating Storage Humidity 5 to 95 Operation Modes...

Page 2: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 2 Transcend...

Page 3: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 3 Block Diagram...

Page 4: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 4...

Page 5: ...2 A07 2 I I1Z 13 VCC Power 13 VCC Power 13 VCC Power 14 A06 I I1Z 14 A06 I I1Z 14 A06 2 I I1Z 15 A05 I I1Z 15 A05 I I1Z 15 A05 2 I I1Z 16 A04 I I1Z 16 A04 I I1Z 16 A04 2 I I1Z 17 A03 I I1Z 17 A03 I I1...

Page 6: ...3 49 D10 1 I O I1Z OZ3 49 D10 1 I O I1Z OZ3 50 GND Ground 50 GND Ground 50 GND Ground Note 1 These signals are required only for 16 bit accesses and not required when installed in 8 bit systems Device...

Page 7: ...n the CompactFlash Specification to reduce power use Input Characteristics Table 2 Input Characteristics MIN TYP MAX MIN TYP MAX Type Parameter Symbol VCC 3 3 V VCC 5 0 V Units 1 Input Voltage CMOS Vi...

Page 8: ...Table 4 Output Drive Characteristics Type Parameter Symbol Conditions MIN TYP MAX Units 1 Output Voltage Voh Vol Ioh 4 mA Iol 4 mA Vcc 0 8V Gnd 0 4V Volts 2 Output Voltage Voh Vol Ioh 4 mA Iol 4 mA V...

Page 9: ...ode I O 46 This signal is asserted high as BVD1 is not supported This signal is asserted low to alert the host to changes in the READY and Write Protect states while the I O interface is configured It...

Page 10: ...its CSEL PC Card Memory Mode CSEL PC Card I O Mode CSEL True IDE Mode I 39 This signal is not used for this mode but should be connected by the host to PC Card A25 or grounded by the host This signal...

Page 11: ...ed by the device In True IDE Mode DMARQ shall not be driven when the device is not selected in the Drive Head register While a DMA operation is in progress CS0 CE1 and CS1 CE2 shall be held negated an...

Page 12: ...by the host interface It is used to read data from the CompactFlash Storage Card in Memory Mode and to read the CIS and configuration registers In PC Card I O Mode this signal is used to read the CIS...

Page 13: ...the host in response to DMARQ to initiate DMA transfers In True IDE Mode while DMA operations are not active the card shall ignore the DMACK signal including a floating condition If DMA operation is n...

Page 14: ...eceive Ultra DMA data out bursts The device may negate DDMARDY to pause an Ultra DMA transfer In all modes when Ultra DMA mode DMA Read is active this signal is the data in strobe generated by the dev...

Page 15: ...ger High level input voltage VIH 2 92 V Schmitt trigger 1 0 8 V Non schmitt trigger Low level input voltage VIL 1 70 V Schmitt trigger 1 Pull up resistance 2 RPU 50 73 KOhm Pull down resistance RPD 50...

Page 16: ...UDMA mode 4 In UDMA modes greater than 4 the characteristics specified in the following table apply Voltage output high and low values shall be met at the source connector to include the effect of ser...

Page 17: ...by the host Pull down to Gnd R 5 6 K 5 PC Card True IDE hosts switch the pull up to pull down in True IDE mode if DMA operation is supported The PC Card mode Pull up may be left active during True IDE...

Page 18: ...l be able to drive at least the following load 10 while meeting all AC timing requirements 100pF with DC current 1 6mA low state and 300 A high state This permits the host to wire two sockets in paral...

Page 19: ...tra DMA modes Table describes typical values for series termination at the host and the device Table Typical Series Termination for Ultra DMA Signal Host Termination Device Termination HIOE HDMARDY HS...

Page 20: ...l be no more than 0 5 shorter than either STROBE trace as measured from the IC pin to the connector Ultra DMA Mode Cabling Requirement Operation in Ultra DMA mode requires a crosstalk suppressing cabl...

Page 21: ...A tAVQV 300 Card Enable Access Time ta CE tELQV 300 Output Enable Access Time ta OE tGLQV 150 Output Disable Time from CE tdis CE tEHQZ 100 Output Disable Time from OE tdis OE tGHQZ 100 Address Setup...

Page 22: ...Detailed timing specifications are shown in Table below Table Configuration Register Attribute Memory Write Timing Speed Version 250 ns Item Symbol Min ns Max ns Write Cycle Time tc W 250 Write Pulse...

Page 23: ...lowing HOE th CEx tGHEH 20 15 15 10 Wait Delay Falling from HOE tv IORDY HOE tGLWTV 35 35 35 na 1 Data Setup for Wait Release tv IORDY tQVWTH 0 0 0 na 1 Wait Width Time2 tw IORDY tWTLWTH 350 350 350 n...

Page 24: ...ld Time th HA tGHAX 20 15 15 15 CEx Hold following HWE th CEx tGHEH 20 15 15 10 Wait Delay Falling from HWE tv IORDY HWE tWLWTV 35 35 35 na1 WE High from Wait Release tv IORDY tWTHWH 0 0 0 na1 Wait Wi...

Page 25: ...th HIOE tlGHQX 0 5 5 5 HIOE Width Time tw HIOE tlGLIGH 165 70 65 55 Address Setup before HIOE tsuA HIOE tAVIGL 70 25 25 15 Address Hold following HIOE thA HIOE tlGHAX 20 10 10 10 CEx Setup before HIOE...

Page 26: ...HIOW tlWHDX 30 10 5 5 HIOW Width Time tw HIOW tlWLIWH 165 70 65 55 Address Setup before HIOW tsuA HIOW tAVIWL 70 25 25 15 Address Hold following HIOW thA HIOW tlWHAX 20 20 10 10 CEx Setup before HIOW...

Page 27: ...OE high is 0 nsec but minimum HIOE width shall still be met 1 t0 is the minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command inactive...

Page 28: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 28...

Page 29: ...dth min 215 80 70 65 55 1 tE HIOE data access max 150 60 50 50 45 tF HIOE data hold min 5 5 5 5 5 tG HIOE HIOW data setup min 100 30 20 15 10 tH HIOW data hold min 20 15 10 5 5 tI HREG to HIOE HIOW se...

Page 30: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 30...

Page 31: ...BE and DSTROBE signals are active on both the rising and the falling edge 5 Address lines 03 through 10 are not used in True IDE mode Several signal lines are redefined to provide different functions...

Page 32: ...ll clear any previously selected Ultra DMA mode and revert to the default non Ultra DMA modes after executing a power on or hardware reset Both the host and device perform a CRC function during an Ult...

Page 33: ...112 73 54 39 25 16 8 13 0 Note 3 t2CYC 230 153 115 86 57 38 29 Sender tDS 15 0 10 0 7 0 7 0 5 0 4 0 2 6 Recipient tDH 5 0 5 0 5 0 5 0 5 0 4 6 3 5 Recipient tDVS 70 0 48 0 31 0 20 0 6 7 4 8 4 0 Sender...

Page 34: ...tCS CRC word setup time at device 2 tCH CRC word hold time device 2 tCVS CRC word valid setup time at host from CRC valid until DMACK negation 3 tCVH CRC word valid hold time at sender from DMACK neg...

Page 35: ...n a configuration with a single device located at the end of the cable This could result in the minimum values for tDS and tDH for mode 5 at the middle connector being 3 0 and 3 9 ns respectively Name...

Page 36: ...ting the connector If the test point is on a cable conductor rather than the PCB an adjacent ground conductor shall also be cut within one half inch of the connector The test load and test points shou...

Page 37: ...EG OE WE A10 A9 A8 A4 A3 A2 A1 A0 SELECTED SPACE 1 1 X X X X X XX X X X X Standby and UDMA transfer X 0 0 0 1 0 1 XX X X X 0 Configuration Registers Read 1 0 1 0 1 X X XX X X X X Common Memory Read 8...

Page 38: ...0 0 0 0 or 1 RD Static Device Initiating BurstTermination 1 1 1 0 1 1 0 or 1 RD Static Host Acknowledement of Device Initiated Burst Termination 1 1 0 0 1 0 0 or 1 YES Static Host Initiating BurstTer...

Page 39: ...n Byte Read Byte Access CIS ROM 8 bits No L H L2 L L L L2 H High Z Even Byte Write Byte Access CIS 8 bits Invalid No L H L2 L L L H L2 Don t Care Even Byte Read Byte Access Configuration CompactFlash...

Page 40: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 40 Configuration Option Register Base 00h in Attribute Memory...

Page 41: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 41 Card Configuration and Status Register Base 02h in Attribute Memory...

Page 42: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 42 Pin Replacement Register Base 04h in Attribute Memory...

Page 43: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 43 Socket and Copy Register Base 06h in Attribute Memory...

Page 44: ...torage responds The CompactFlash Storage Card may request the host to extend the length of an input cycle until data is ready by asserting the WAIT signal at the start of the cycle Function Code DMA C...

Page 45: ...ion Active 1 1 0 1 0 X or YES Static Burst Transfer 1 1 0 1 0 1 0 or 1 RD Static Data In Burst Host Pause 1 1 0 1 0 0 0 or 1 RD Static Data In Burst Device Pause 1 1 0 1 0 1 0 or 1 WR Static Data Out...

Page 46: ...s Don t Care H H H H L L L H L L H H High Z High Z Even Byte Odd Byte Byte Write 8 bits Don t Care H H H H L L L H H H L L Don t Care Don t Care Even Byte Odd Byte Word Read 16 bits Don t Care H L L X...

Page 47: ...mpactFlash Storage Cards may support the following optional detection methods 1 The card is permitted to monitor the OE ATA SEL signal at any time s and switch to PCMCIA mode upon detecting a high lev...

Page 48: ...ed such that a cable exceeding 0 15 meters is required to connect the host to the card The load presented to the Host by cards supporting Ultra DMA is more controlled than that presented by other Comp...

Page 49: ...h 3F6h 3F7h primary or 170h 177h 376h 377h secondary with IRQ 14 or other available IRQ b Any system decoded 16 byte I O block using any available IRQ c Memory space The communication to or from the C...

Page 50: ...TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 50 I O Primary and Secondary Address Configurations Table Primary and Secondary I O Deco...

Page 51: ...Transcend Information Inc V1 0 51 Contiguous I O Mapped Addressing When the system decodes a contiguous block of I O registers to select the CompactFlash Storage Card the registers are accessed in th...

Page 52: ...0 52 Memory Mapped Addressing When the CompactFlash Storage Card registers are accessed via memory references the registers appear in the common memory space window 0 2K bytes as follows True IDE Mod...

Page 53: ...additional information about the source of an error when an error is indicated in bit 0 of the Status register This register is also accessed in PC Card Modes on data bits D15 D8 during a read operati...

Page 54: ...s 1F5h 175h Offset 5 This register contains the high order bits of the starting cylinder address or bits 23 16 of the Logical Block Address Drive Head LBA 27 24 Register Address 1F6h 176h Offset 6 The...

Page 55: ...valid when this bit is set to a 1 During the data transfer of DMA commands the Card shall not assert DMARQ unless either the BUSY bit the DRQ bit or both are set to one Bit 6 RDY RDY indicates whethe...

Page 56: ...e host software should set this bit to 0 Bit 4 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to 0 Bit 3 this bit is ignored by the CompactFlash Storage Car...

Page 57: ...conditionally tri state D7 of I 0 address 3F7h 377h when a CompactFlash Storage Card is installed and conversely to tristate D6 D0 of I O address 3F7h 377h when a floppy controller is installed 4 Do n...

Page 58: ...alize Drive Parameters 91h Y Y Support 10 Key Management Structure Read B9 Feature 0 127 Y Y Y Y Y NOT Support 1 11 Key Management Read Keying Material B9 Feature 80 Y Y Y Y Y NOT Support 1 12 Key Man...

Page 59: ...Y Y Y Y Support 38 Write Long Sector 32h or 33h Y Y Y Y Not Support 2 39 Write Multiple C5h Y Y Y Y Y Support 40 Write Multiple w o Erase CDh Y Y Y Y Y Support 41 Write Sector s 30h or 31h Y Y Y Y Y...

Page 60: ...ostic command is issued in a PCMCIA configuration mode this command runs only on the CompactFlash Storage Card that is addressed by the Drive Head register This is because PCMCIA card interface does n...

Page 61: ...pact Flash Storage Card does not support the Flush Cache command the Compact Flash Storage Card shall return command aborted Bit 7 6 5 4 3 2 1 0 Command 7 E7h C D H 6 X Drive X Cyl High 5 X Cyl Low 4...

Page 62: ...e card and aaaa indicates an ASCII string specific to the particular drive Word Address Default Value Total Bytes Data Field Type Information 848Ah 2 General configuration signature for the CompactFla...

Page 63: ...modes this value shall be 0h 66 0078h 2 Recommended Multiword DMA transfer cycle time In PC Card modes this value shall be 0h 67 0078h 2 Minimum PIO transfer cycle time without flow control 68 0078h...

Page 64: ...serving all Retired bits in the word 0040h This is the alternate value of Word 0 turns on ATA device and turns off Removable Media and Removable Device while zeroing all Retired bits in the word Bit 1...

Page 65: ...e CompactFlash Storage Card supports for Read Write Multiple commands Word 49 Capabilities Bit 13 Standby Timer If bit 13 is set to 1 then the Standby timer is supported as defined by the IDLE command...

Page 66: ...s supported bit 1 of word 53 shall be set to one This field is bit significant Any number of bits may be set to one in this field by the CompactFlash Storage Card to indicate the Multiword DMA modes i...

Page 67: ...inimum cycle time that the CompactFlash Storage Card supports while performing data transfers while utilizing IORDY flow control If this field is supported Bit 1 of word 53 shall be set to one Any Com...

Page 68: ...e the Power Management feature set is supported Bit 4 of word 85 shall be set to zero the Packet Command feature set is not enabled If bit 5 of word 85 is set to one write cache is enabled If bit 6 of...

Page 69: ...r the Security Erase Unit command to complete This command shall be supported on CompactFlash Storage Cards that support security Value Time 0 Value not specified 1 254 Value 2 minutes 255 508 minutes...

Page 70: ...to 1 the device supports CPRM Scheme Content Protection for Recordable Media If set to 0 the device does not support CPRM Bits 1 15 are reserved for future additional Key Management schemes Word 163...

Page 71: ...ngs This word describes the capabilities and current settings for CFA defined advanced timing modes using the Memory and PCMCIA I O interface Notice The use of PCMCIA I O or Memory modes that are 100n...

Page 72: ...MA timing mode Supported 0 PC Card Memory UDMA mode 0 supported 1 PC Card Memory UDMA mode 1 supported 2 PC Card Memory UDMA mode 2 supported 3 PC Card Memory UDMA mode 3 supported 4 PC Card Memory UD...

Page 73: ...Bit 7 6 5 4 3 2 1 0 Command 7 97h or E3h C D H 6 X Drive X Cyl High 5 X Cyl Low 4 X Sec Num 3 X Sec Cnt 2 Timer Count 5 msec increments Feature 1 X Idle Immediate 95h or E1h This command causes the Co...

Page 74: ...6 5 4 3 2 1 0 Command 7 00h C D H 6 X Drive X Cyl High 5 X Cyl Low 4 X Sec Num 3 X Sec Cnt 2 X Feature 1 X Read Buffer E4h The Read Buffer command enables the host to read the current contents of the...

Page 75: ...S S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 75 Read Multiple C4h Read Sector s 20h or 21h Read Verify Sector s 40h or 41h Recalibrate...

Page 76: ...G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 76 Request Sense 03h The extended error code is returned to the host in the Error Register Seek 7Xh...

Page 77: ...nd the IOIS16 signal shall not be asserted for data register accesses The host shall not enable this feature for DMA transfers Features 02h and 82h allow the host to enable or disable write cache in C...

Page 78: ...pper 5 bits define the type of transfer and the low order 3 bits encode the mode value One PIO mode shall be selected at all times For Cards which support DMA one Multiword DMA mode shall be selected...

Page 79: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 79 Standby Immediate 94h or E0h Translate Sector 87h Translate Sector Information...

Page 80: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 80 Wear Level F5h Write Buffer E8h Write DMA CAh...

Page 81: ...TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 81 Write Long Sector 32h or 33h Write Multiple Command C5h Write Multiple without Erase...

Page 82: ...T T TS S S8 8 8G G G 1 1 16 6 6G G GC C CF F F6 6 60 0 00 0 0 600X CompactFlash Card Transcend Information Inc V1 0 82 Write Sector s 30h or 31h Write Sector s without Erase 38h Write Verify 3Ch...

Page 83: ...Parameters V V V Key Management Structure Read V V V V V V Key Management Read Keying Material V V V V V V Key Management Change Key Management Value V V V V V V NOP V V V V Read Buffer V V V V V Rea...

Page 84: ...nslate Sector V V V V V V V V Wear Level V V V V V V V V V Write Buffer V V V V V Write DMA V V V V V V V V Write Long Sector V V V V V V V V Write Multiple V V V V V V V V Write Multiple w o Erase V...

Page 85: ...transcend co jp www transcend jp CHINA E mail sales transcendchina com www transcendchina com GERMANY E mail vertrieb transcend de www transcend de HONG KONG E mail sales transcend com hk www transcen...

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