Toshiba TW40F80 Technical Training Manual Download Page 87

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Fig. 11-1 Block diagram

Filter

D/A

RAM (8

∗

12bit)

∗

Counter

PLL

32MHz

M-CON

DATA

CLK

RESET

R716, C711

PROM

MEMORY

01 T7

Load

Save

Main bus line

Test patt

Summary of Contents for TW40F80

Page 1: ...th its file No 026 9506 are described on this manual For other parts common with N5SS chassis please refer to the original manual with its file No 026 9506 1997 TOSHIBA AMERICA CONSUMER PRODUCTS INC NATIONAL SERVICE DIVISION TRAINING DEPARTMENT 1420 B TOSHIBA DRIVE LEBANON TENNESSEE 37087 PHONE 615 449 2360 FAX 615 444 7520 www toshiba com tacp ...

Page 2: ...E OF CHANNEL SELECTION CIRCUIT SYSTEM 18 2 OPERATION OF CHANNEL SELECTION CIRCUIT 18 3 MICROCOMPUTER 19 4 MICROCOMPUTER TERMINAL FUNCTION 20 5 EEPROM QA02 22 6 ON SCREEN FUNCTION 22 7 SYSTEM BLOCK DIAGRAM 23 8 LOCAL KEY DETECTION METHOD 24 9 REMOTE CONTROL CODE ASSIGNMENT 25 10 ENTERING TO SERVICE MODE 28 11 TEST SIGNAL SELECTION 28 12 SERVICE ADJUSTMENT 28 13 FAILURE DIAGNOSIS PROCEDURE 29 14 TRO...

Page 3: ...TION VII 3 DIMENSION Y C SEPARATOR CIRCUIT 58 1 OUTLINE 58 2 CIRCUIT DESCRIPTION 58 SECTION VIII VERTICAL OUTPUT CIRCUIT 60 1 OUTLINE 60 2 V OUTPUT CIRCUIT 61 3 PROTECTION CIRCUIT FOR V DEFLECTION STOP 64 4 RASTER POSITION SWITCHING CIRCUIT 66 SECTION IX HORIZONTAL DEFLECTION CIRCUIT 67 1 OUTLINE 67 2 HORIZONTAL DRIVE CIRCUIT 67 3 BASIC OPERATION OF HORIZONTAL DRIVE 67 4 HORIZONTAL OUTPUT CIRCUIT ...

Page 4: ...8859CP 82 2 DIODE MODULATOR CIRCUIT 83 3 ACTUAL CIRCUIT 84 SECTION XI DIGITAL CONVERGENCE CIRCUIT 87 1 OUTLINE 87 2 CIRCUIT DESCRIPTION 87 3 PICTURE ADJUSTMENT 89 4 CASE STUDY 97 5 TROUBLESHOOTING 98 6 CONVERGENCE OUTPUT CIRCUIT 99 7 CONVERGENCE TROUBLESHOOTING CHART 101 Contents Page 3 OVERALL BLOCK DIAGRAM 102 ...

Page 5: ...s chassis introduces a new bus system devel oped by the PHILIPS company called the I2C or IIC bus IIC stands for Inter Integrated Circuit control This bus co ordinates the transfer of data and control between ICs inside the TV It is a bi directional serial bus consisting of two lines named SDA Serial DATA and SCL Serial CLOCK This bus control system is made possible through the use of digi tal to ...

Page 6: ...dio W 28W 28W 28W 28W 28W 28W 28W 28W 28W 28W 28W Center 20W 20W 20W Rear 20W 20W 20W 20W 20W 20W Comb Filter 3D Y C 3D Y C 3D Y C 3D Y C DIG DIG DIG DIG DIG DIG DIG DQF Scan Modul VCC Black Expan Color D E Pic Prefer Color Temp Flesh Tone Nois Reduce Hori Resolu 800 800 800 800 800 800 800 800 800 800 800 Fav Channel Ch Label 3 Language Clock Ch Lock Off C Caption EDS New OSD S Sight S Video In 1...

Page 7: ...O MENU ANT VIDEO ENTER VOLUME CHANNEL POWER indicator POWER button Press to open the door Behind the door ANT VIDEO button ENTER button S VIDEO VIDEO L MCNO R AUDIO IN VIDEO 3 VIDEO 3 INPUTS DEMO button MENU button CHANNEL buttons buttons VOLUME buttons buttons ...

Page 8: ...NT ANT 75 TV AMP L VIDEO AUDIO R VIDEO1 VIDEO AUDIO L Y S VIDEO C4 AUDIO R VIDEO AMP R VIDEO VIDEO2 DVD L R VAR ACC AMP N CUT MAIN SPEAKER Ð Ð EXTERNAL SPEAKER terminal MAIN SPEAKER switch VIDEO AUDIO INPUT jacks VIDEO 1 VIDEO AUDIO INPUT jacks VIDEO 2 DVD INPUT jacks VIDEO AUDIO OUTPUT jacks S VIDEO INPUT jack VIDEO 1 VARIABLE AUDIO OUTPUT jacks TV rear Fig 1 3 ...

Page 9: ...EL 25 CH RTN 26 VOLUME 25 MENU 18 POP CH 40 18 RESET 33 POP functions 40 For TV and CABLE positions POP CH 40 FAN 46 ENTER 19 EDS 27 Channel Number 25 TV VIDEO 55 TV CABLE VCR switch 15 Set to TV to control the TV TIMER 38 39 EXIT ON Owner s Manual page These function do not have duplicate locations on the TV They can be controlled only by the Remote Control FAN 46 Aim at the remote sensor on the ...

Page 10: ...2 160 DIGITAL CONVER 10 2pcs CHIP DOUBLE FACED TW56F80 ONLY 242 139 DUAL 11 2pcs CHIP DOUBLE FACED 242 155 3D Y C 12 2pcs CHIP DOUBLE FACED 189 139 MAC 13 4pcs CHIP DOUBLE FACED 330 139 AUDIO LIVE 14 6pcs CHIP SINGLE FACED 242 126 SIARSIGHT 15 1pcs CHIP DOUBLE FACED 242 113 DOLBY PRO 16 2pcs CHIP DOUBLE FACED MODE1 TW40F80 TW56F80 TUNER DOLBY DSP F SUR COHB FDS N OSD STARSIGHT 2 2 PRO 4CH 3DYC 3DY...

Page 11: ...pcs A521 BRT TBS 4x16 2pcs W661 W664 PMM 4x16 2pcs A506 BRB TBS 4x16 4pcs A508 BIDT2 4x12 2pcs A523 PMM 4x16 2pcs A509 BTA 4x16 4pcs A106 A102 A501 BTA 4x16 16pcs A202 A516 PMS 3 8x28 3pcs A515 PMM 4X16 4pcs A205 A127 A128 K511 A519 BIDT2 4x12 5pcs A107 A104 A105 A508 BIDT2 4x12 4pcs A513 BIDT2 4x12 A104 A108 A105 A503 PMM 4x16 8pcs L462 L464 L472 L474 K103 A511 PP4x14 4pcs A510 BRBTB 5x16 4pcs V9...

Page 12: ...ner EL466L that which contains an integrated PLL circuit is employed 3 Wide band double SAW filter F1802R used 4 FS frequency synthesizer type channel selection sys tem employed EL466L Tuner RF AGC IF MTS S PRO Module MVUS34S SIF output Sound Multiplex Circuit SAW Filter VIF SIF Circuit S PRO Circuit AFT output TP12 Video output To A V switch circuit TV R OUT TV L OUT C IN R IN L IN R OUT L OUT L ...

Page 13: ...ge are used to control the matrix The audio signals obtained by demodulating the sound mul tiplex signal develop at pin 10 and 11 of HIC and develop the terminals of 12 and 14 of the module MVUS34S MPX Out DAC out1 SURR ON OFF DAC out2 RFSW TV R Out TV L Out 9 10 11 12 13 14 15 Stereo 0V SAP 0V OFF 0V Other 5V Other 5V ON 9V RF1 0V RF2 9V To AV select circuit Monitor the input pin for multiplex so...

Page 14: ...ignals sent from a microcomputer Fig 2 3 shows a block diagram of the A PRO IC TA1217N Lin Rin Cin Win SDA SCL TONE CONTROL LPF Center LEVEL Woofer LEVEL VOLUME BALANCE I C 2 D A CONV I O L out R out C out W out SAP Ident STE Ident R in C in L in SCL SDA W out O out L out From From From A V Dolby A V to Q670 to Q640 to Q670 to Q670 Via QS101 7 31 24 23 22 19 26 25 18 10 30 9 8 28 1 27 29 22 32 36 ...

Page 15: ...IP OUTPUT VIDEO 1 VIDEO 2 VIDEO 3 FOR POP IF MODULE AUDIO L R PIP OUT AUDIO VIDEO 1 VIDEO 2 OR DVD VIDEO 3 FRONT INPUT R L R L R L R L VIDEO OUTPUT TERMINAL VARIABLE AUDIO OUTPUT TERMINAL R L FRONT SURROUND UNIT VIF MTS A PRO MODULE R L R L Q601 R L R OUT L OUT W OUT 12 14 EQ ER AS AR AI AJ 6 7 11 13 3 9 15 17 29 31 2 1 35 37 16 18 25 24 22 2 5 11 7 TW40F80 NOT USE ...

Page 16: ...na and develops an AFT output video output and audio output The tuner has receive channels of 181 as in the tuner for the main screen and it is also controlled through the I2C bus As the IC for the IF a PLL complete sync detection plus audio inter carrier system are employed Label Name Lot No 1 15 Fig 2 6 Tuner terminal layout Terminal No Name 1 NC 2 32V 3 S CLOCK 4 S DATA 5 NC 6 ADDRESS 7 5V 8 RF...

Page 17: ...meters such as white balance RGB cutoff GB drive and gcorrection etc Setting of video parameters of video modes Stan dard Movie Memory 2 CONTROL OF A V SWITCH IC QV01 Toshiba TA1218N Performs source switching for main screen and sub screen Performs source switching for TV and three video inputs 3 CONTROL OF NON VOLATILE MEMORY IC QA02 Microchip 24LC08BI P Memorizes data for video and audio signal ...

Page 18: ...ich utilizes ACK function of I2C is equipped Function indication is added to service mode Remote control operation is equipped and the control by set no touch is possible Bus connector in the con ventional bus chassis is deleted Substantial self diagnosis function 1 B W composite video signal generating function micom inside green crossbar added 2 Generating function of audio signal equivalent to ...

Page 19: ...N4 P61 AIN5 P62 P63 VSS VDD P57 P32 P57 SDA0 SCL0 TC3 P31 RXIN P30 P20 RESET XOUT XIN TEST 0SC2 0SC1 VD OSD RESET DATA BUSY CS CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 GND BAL REM OUT MUTE SP MUTE NC POWER LED SSRST DVD CONT SCL0 SDA0 SYNC VCD PIPRST AFT2 AFT1 KEY A KEY B SGV SGA GND IIC BUS 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 VDD ACP SS VD I C STOP SDA1...

Page 20: ... TEST SIGNAL OUT Out Test signal output In normal L 0V 20 SGA TEST AUDIO OUT Out Test audio output In normal L 0V 21 VSS POWER GROUNDING 0V Gounding voltage 0V 22 CLK CLOCK OSD Out At display on Pulse 23 CS CHIP SELECT Out At display on Pulse 24 BUSY BUSY OSD In At display on Pulse 25 DATA DATA OSD Out At display on Pulse 26 OSD RESET RESET OSD Out Reset L 27 VSYNC In VSYNC Pulse 28 OSC1 DISPLAY C...

Page 21: ...0F80 employs the external OSD IC QR60 MB90091 to obtain high quality OSD 54 56 58 55 16 64 59 60 61 22 23 24 25 26 R OUT G OUT B OUT SCLK SCS TRE SIN RESET VOB2 VIDEO YM CLK CS BUSY DATA OSD RESET QR60 MB90091 QA01 Microprocessor QR60 is controlled by the microprocessor QA01 with the exclusive control signals of CLK DATA CS BUSY RE SET Type name is 24LC08BI P or ST24C08CB6 and those are the same i...

Page 22: ...SDA SCL Sub U V tuner EL922L 28 27 Q501 SDA SCL VCD TA1222AN 20 21 HO02 SDA SCL IF MPX A PRO MVUS5345 25 24 QV01 SDA SCL AV SW TA1218N DPC unit 19 20 QZ01 SDA SCL YCS TC9086F QY91 SDA SCL DUAL micro processor 39 40 QK06 SDA SCL AUTO LIVE 38 SDA 1 37 SCL 1 35 RMT Remote controller light receiving unit 17 KEY A Key switch 33 RST 42 VDD 1 GND 21 VSS 7 POWER 31 XIN 8 LED 41 ACP Power supply circuit 32...

Page 23: ...ft is the local key circuit As can be seen from the diagram when one of keys among SA 01 to SA 08 is pressed each of two input terminals pins 17 and 18 developes a voltage VIN corresponding to the key pressed The voltage measurement and key identification are carried out by an A D converter inside the microproces sor and the software 17 18 SA08 SA06 SA05 SA07 SA01 SA02 SA03 SA04 Fig 3 6 Local key ...

Page 24: ...TROL 9DH 9EH PIP VOLUME DOWN 9FH Custom codes are 40 BFH TV set for North U S A Code Applicable Applicable Conti Function to remote to TV set nuity control 00H 0 Channel 01H 1 Channel 02H 2 Channel 03H 3 Channel 04H 4 Channel 05H 5 Channel 06H 6 Channel 07H 6 Channel 08H 8 Channel 09H 8 Channel 0AH 100 Channel 0BH ANT 1 2 0CH RESET 0DH AUDIO 0EH PICTURE FUNC 0FH TV VIDEO 10H MUTE 11H CHANNEL SEARC...

Page 25: ... Code Applicable Conti Function to TV set nuty A0H SUB BRIGHT ADJUSTMENT A1H G DRIVE ADJUSTMENT A2H B DRIVE ADJUSTMENT A3H A4H CUTOFF DRIVE 40H INITIALIZING HORIZONTAL ONE LINE A5H R CUTOFF ADJUSTMENT A6H G CUTOFF ADJUSTMENT A7H B CUTOFF ADJUSTMENT A8H MEMORY ALL AREA INITIALIZE A9H PIP BRIGHT ADJUSTMENT AAH SUB CONTRAST ADJUSTMENT ABH HOR VERPICTUREPOSITONADJUSTMENT ACH SUB COLOR ADJUSTMENT ADH S...

Page 26: ... 0 0 0 0 0 D5 0 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 1 1 1 1 1 1 1 1 1 D2 0 0 0 1 0 1 0 0 0 1 0 0 D3 0 0 0 1 1 1 0 0 0 0 0 0 D0 HEX 00H 00H 00H 1CH 18H 1CH 18H 10H 10H 14H 10H 10H D1 OPT0 OPT1 Normal 0 Free run 1 NON0 CONV1 NON0 3DYC NON0 DOLBY1 NOT USED NOT USED DSP0 SRD1 NOT USED PP0 MP1 SS 0 NONSS 1 NOT USED Normal 0 f0 STOP 1 CYC0 SBS1 NOT USED MODE Fixed Normal00 STD 01 HRC 10 1RC 11 9 1 Optional S...

Page 27: ...c Direct selection of adjustment item R CUTOFF 1 POS remote unit G CUTOFF 2 POS remote unit B CUTOFF 3 POS remote unit d Data setting for PC unit adjustment SUB CONTRAST 4 POS remote unit SUB COLOR 5 POS remote unit SUB TINT 6 POS remote unit e Horizontal line ON OFF VIDEO on TV set f Test signal selection VIDEO remote unit In service mode serviceable items are limited 3 Test audio signal ON OFF 8...

Page 28: ...QV01 QV01S E F B C D Table 3 3 Contents of self diagnosis A DISPLAY OF FAILURE INFORMATION IN NO PICTURE Condition of display 1 When power protection circuit operates 2 When I2C BUS line is shorted Display items and actual operation Power indicator lamp blinks and picture does not come 1 Power indicator red lamp blinks 0 5 seconds interval 2 Power indicator red lamp blinks 1 seconds interval If th...

Page 29: ...hen by checking the existence or non of sync part the result of self diagnosis is displayed on screen Besides when 9 key on remote unit is pressed diagnosis operation is first executed once Instruction of results Indication of OK for normal result NG for abnormal Indication of OK for normal result Indication of failure place in abnormality Failure place to be indicated QA02 NG H001 NG Q501 NG H002...

Page 30: ...ser adjusting contents to factory setting value Adjust ment is required 13 4 2 Method utilizing inner signal VIDEO INPUT 1 terminal should be open 1 With service mode screen press VIDEO button on re mote unit If inner video signal can be received QV01 and after are normal 2 With service mode screen press 8 button on remote unit If sound of 1 kHz can be heard QV01 and after are normal By utilizing ...

Page 31: ...of voltage at pin 7 of QA01 DC 5V 8MHz oscillation waveform at pin 32 of QA01 Pulse output at pins 37 and 38 of QA01 Check relay driving circuit Check power circuit Check OSC circuit Replace QA01 Voltage check at pin 32 of QA01 DC 5V Check reset circuit Replace QA01 YES NG NG NG NG OK NO OK OK OK ...

Page 32: ...age at pins of 5V and 32V Check H001 Check tuner power circuit Key on TV Voltage change at pins 17 18 of QA01 5V to 0V Replace QA01 Check key in circuit NG OK NG OK Remote unit key Pulse input at pin 35 of QA01 When remote unit key is pressed Replace QA01 Check tuner power circuit ...

Page 33: ... Check of character signal at pin 59 60 61 of QR60 5V p p Check V C D circuit Replace QA01 or QR60 or QR63 Replace QA01 or QR60 Replace QR60 NG NG NG OK OK Memory circuit check Voltage check at pin 8 of QA02 5V Pulse input at pins 5 and 6 of QA02 in memorizing operation Replace QA02 Adjust items of TV set adjustment Note Use replacement parts for QA02 Check power circuit Check QA01 ...

Page 34: ...AC UNIT Y Q B Y I R Y Y Q I Y Q I Y C DUAL UNIT Sub V Sub Y Sub C ZY01 Y C SEPARATOR 42 Sub V 36 34 Y C QV01 AV SW TA1218N 21 VIDEO 3 VIDEO 1 Insertion detection 10 DVD CONTROL I C BUS 2 QA01 MAICROPROCESSOR L Normal H DVD VIDEO2 DVD Q501 VCD TA1222AN I C BUS 2 MAIN Y Cr Cb Fig 4 1 SECTION IV DVD SWITCH CIRCUIT ...

Page 35: ... color difference signal inputs Cr R Y and Cb B Y are used exclusively The input identification for VIDEO 2 and DVD is carried out by setting pin 21 of QV01 TA1218N AV SW IC from L to H when the cable is connected to the Cb input ter minal with a switch equipped The main microprocessor QA01 sets pin 10 of QA01 from L to H through I2C bus when pin 21 of AW SW IC develops H Cb input Open at Cb input...

Page 36: ...a low pass filter and amplifiers in the same way as the Y signal and enter pins 1 and 78 of QX01 respectively The Y I and Q signals entered are clamped by built in clamp circuit converted into digital signals by the built in A D con verter Moreover their read write operations are rated up by twice or 3 4 times to perform a compression process of 1 2 or 3 4 times inside the built in line memory And...

Page 37: ... 12 2 5 52 47 78 3 59 60 2 3 4 5 6 7 8 I Q Y 9V 2 PX01 5V 3 GND I IN Q IN Y IN SCL 2 SDA 2 1 2 3 4 5 6 7 8 LPF AMP LPF LPF LX15 etc LX16 etc LX17 etc LPF LPF AMP QX20 QX22 QX24 10 11 18 QX21 QX19 ADJ LX18 QX18 HVBLK PX02 VD IN HD IN GND YD ID QD VP OUT QX23 QX25 50 30 QX30 QX31 QX32 9 10 11 1 3 13 QX01 TC9097F QX02 TA8667F QX03 TC4053BF Fig 5 1 Wide aspect conversion unit block diagram PB6348 ...

Page 38: ...T TMO4 VMO TMO5 HRF TMO6 VBL TMO7 NC HBL TMO8 RCK WCK VDD DIG NC VSS5 VCO2 NC VFL2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VDD4 VCO1 VLM VDD DIG HDI NC VDI RESET NC NC TST0 TST1 TST2 NC HDF VSS DIG VDD5 VCO2 VSS1 AD VBA QSI VBM NC VRA1 VDD1 AD NC NC VSS DIG NC TDI0 TDI1 TDI2 TDI3 TDI4 26 27 28 29 30 31 32 ...

Page 39: ... Bias for clamp 1 Reference voltage for DA2 DA3 Bias 2 high level for DA2 DA3 Analog power Q color signal output Bias 2 low level for DA2 DA3 Analog ground I signal output Reference voltage for DA1 Analog power Y signal output Bias 1 high level for DA1 Analog ground Bias 2 high level for DA1 Analog ground Connected to VSS or VDD Connected to VDD Analog power 1 2 VDD for line memory Digital power C...

Page 40: ... Ext clock input memory write clock Ext clock input memory read clock H blanking signal V blanking signal H AFC reference signal H AFC mask signal Side panel timing signal Q signal select pulse I signal select pulse V drive pulse Later stage clamp pulse I2C SCL signal input I2C SDA signal input output Prefilter switch signal 1 Prefilter switch signal 2 Prestage clamp pulse output Test input normal...

Page 41: ...I VDI VSS Digital VDD5 VCO2 CLAMP1 AD2 AD1 TEST CIRCUIT TIMING CONTROLER LINE MEMORY 624x8 LINE MEMORY 624x8 DA1 VDD2 DA1 VSS2 DA1 VBD1 VBD2 VRD2 VBD3 HBL TMO8 VBL TMO7 HRF TMO6 VMO TMO5 SPT TMO4 QSL TMO3 ISL TMO2 VDP TMO1 ACP TMO0 SCL NCS TDI7 SE42 TDI6 BCP TDI5 VRD1 VBD4 YSO Y DA2 DA3 LINE MEMORY 1248x8 LINE MEMORY 1248x8 POST FILTER ISO I POST FILTER VDD3 DA2 3 VSS3 DA2 3 QSO Q POST FILTER QSI ...

Page 42: ...5 6 7 of PX02 OK LX18 adjustment OK Readjustment QX01 input output OK Replace E2PROM OK Check associated circuit Tr etc END I2C bus pin 7 8 of PX01 OK Is clock at pin 47 of QX01 OK Signals at pins 5 6 7 of PX02 OK Output at pin 3 HD of PX02 OK Receive circuit check Check circuits other than WAC unit Check around of QX03 Check around QX02 Replace QX01 Check receive circuit I2C bus line check N N N ...

Page 43: ...requency counter to QX19 emitter 4 Adjust LX18 until frequency reading of 28 7 MHz 0 5 MHz is obtained Horizontal one Output at pin 8 of PX02 OK Check V circuit Output at pin 2 of PX02 OK Check receive circuit Is output OK at I2C bus Data initlalization OK Check I 2C bus line Y N N N N Y Y END Y Replace QX01 ...

Page 44: ... The sub screen process IC TC9092AF is the IC using the programmable technology and can realize various functions such as sub screen 1 2 compression 9 screen multi search etc by switching the program The 9 screen multi search process is carried out by selecting the channel on the right half of the wide screen with 16 9 aspect ratio and the picture images received are projected on the 9 screens fro...

Page 45: ...ON screen display super impose TC4W53F MC74HC4053F 2M memory X2 MSM518221 30ZS Sub screen process IC TC9092AF Main Sub picture superimpose MC74HC4053F Y I Q Y I Q Y I Q I2C BUS Sub screen control micro processor CXP85116B 514Q I2C BUS Wide aspect conversion TC9097F G B R To CRT V C D IC TA1222N From tuner SY SC From main microprocessor Fig 6 1 ...

Page 46: ... is used to convert the R Y and B Y signals into I and Q signals In the GBR matrix circuit each G B and R output is output as G Y B Y and R signals when theY signal is not input Then the B Y signal is converted to Q signal R Y to I signal pseudically by turning the phase by an angle of 33 Thus R Y and B Y signals are input to pins 18 and 19 of QY01 and the output signals from pins 23 and 24 are de...

Page 47: ...processor section QY91 CXP85116B 514Q Sub screen control microprocessor V C D IC QY01 µPC1832GT 12 Y OUT 13 R Y OUT 14 B Y OUT 18 R Y IN 19 B Y IN 23 R OUT I 24 B OUT Q 5 7 1 OSD superimpose OSD superimpose 10 HD OUT 11 VD OUT 1 Waveform shape 13 5 1Q 2Q 1A WHD2 WHD1 WVD I Q 3 3 1 1 6dB Amp To Sub screen process section I2 C BUS SCL SDA QY49 TC4W53F 9 11 12 5 2 14 4 15 Signal reception circuit PY0...

Page 48: ...C BUS SCL SDA WVD WHD2 1 2 4 OR circuit WHD1 WHD QY43 TC7S32F LY102 LY101 PY01 RVD RHD YS Signal reception circuit Video color deflection process section QY03 TC9092AF Sub screen process IC Y OUT R Y OUT I B Y OUT Q YS OUT MWD 0 MWD15 MRD 0 MRD15 Y I Q L P F L P F L P F YS QY10 QY11 MSM518221 30ZS 2M memory Date out To Main Sub pictore superimposing process section Date in Y11 Y12 Y01 The horizont...

Page 49: ...48 MC74HC4053 1 IY Y IN 3 IZ I IN 13 IX Q IN 11 A 10 B 9 C 2 OY Y IN 5 OZ I IN 12 OX Q IN 15 Y COM Y OUT 4 Z COM I OUT 14 X COM Q OUT Y05 Y06 Y04 53 51 52 43 42 41 R G B Y I Q YOUT I Q PY01 Q501 To CRT Main Sub picture superimpose PY02 TA1222N Fig 6 4 Main Sub screen superimposing section The main sub screen superimposing section is shown in Fig 6 4 The sub screen Y I and Q signals sent from the s...

Page 50: ...ave form det IDENT D det PAL NTSC matrix Tint control Color control RGB output 3 58MHz 4 43MHz VCXO PAL SW Filter fH Adj fsc BPF Y R Y B Y input clamp B G R Clamp pulse 1MΩ 0 22µF 1 8 KΩ 18pF 4 43MHz 3 58MHz 18 pF 0 47µF 6 8KΩ 4700pF 0 22µF 1MΩ 1µF 22µF 0 1µF Separate color 1000pF Separate composite SW Vcc 20kΩ 0 22µF 20kΩ Vcc Vcc 0 1µF Contrast control 0 1µF Sub color control 4 7µF 100Ω 180kΩ 150...

Page 51: ... Io filter Color APC filter fsc VCO input 4 43MHz fsc VCO input 3 58MHz fsc VCO output Color killer filter B output G output R output Clamp pulse input 32fm VCO felter 1 32fm VCO felter 1 32fm VCO felter 1 H AFC filter GND sync fv 50 60 SW Power supply sync Color killer output Blanking pulse output HD pulse output VD pulse output Y output R Y output B Y output GND video Y input Power supply video ...

Page 52: ...ERPORATION FILTER 1H MEMORY 12BIT V YC DELAY ADJUSTMENT BETWEEN Y C DAJA CLOCK GENERATION SUB CLOCK GENERATION MAIN PROGRAM DATA MEMORY 16k BIT 3k BIT CU CONTROL UNIT I 2 C INTERFACE I 2 C DATA REARRANGE MENT W PICTURE MEMORY 2M BIT SUB SAMPLE PIT FILLING C DELAY ADJUSTMENT DAJB TELTEXT DETECTION J 1H MEMORY 11BIT FRAME SIGNAL GENERATION WAKU FRAME SIGNAL MULTIPLEX SW DA Y LC LC H V Sub H V Main Y...

Page 53: ...MWD11 MWD12 MWD13 MWD14 MWD15 RSTW WE IE CKW VDD VSS OSCSO OSCSI VDD NFHS FHS FVS VDD VSS ADDVSS ADDVDD RYIN ADBIAS RYIN ADVREFC ADVDD CLAMPC ADVSS CLAMPY ADVSS YIN ADVREFY ADVDD DABIAS2 DABIAS3 DAVSS TC9092AF TOP VIEW 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 8...

Page 54: ... I Sub screen horizontal sync signal reversing input 23 VDD Digital power supply 24 OSCSI I Oscillator connection terminal sub input 25 OSCSO O Oscillator connection terminal sub output 26 VSS Digital GND 27 VDD Digital power supply 28 CKW O Serial write clock output terminal 29 IE O Input enable output terminal 30 WE O Write enable output terminal 31 RSTW O Reset write output terminal 32 MWD15 O ...

Page 55: ...tal power supply 75 FHM I Main screen horizontal sync signal input 76 NFHM I Main screen horizontal sync signal reversing input 77 FVM I Main screen vertical sync signal input 78 VSS Digital GND 79 SCL I I2 C CK input terminal 80 SDA BID I2 C data I O terminal 81 SDAINO O I2 C data direction output terminal Test output terminal 82 VSS Digital GND 83 PROMDI I ROM data input terminal 84 PROMCK O ROM...

Page 56: ...oller Data in Buffer X8 VB3 Generator Din X8 IE WE RSTW SWCK WE Din0 Din2 Vcc Din5 Din7 SWCK NC OE Dout6 Dout4 Dout3 Dout1 RSTR IE Din1 Din3 Din4 Din6 RSTW NC RE Dout7 Dout5 Vss Dout2 Dout0 SRCK 28PIN ZIP 1 3 5 7 9 11 13 15 17 19 21 23 25 27 2 4 6 8 10 12 14 16 18 20 22 24 26 28 Terminal name Function SWCK Serial write clock SRCK Serial read clock WE Write enable RE Read enable IE Input enable OE ...

Page 57: ...INE The 3DYC separation circuit uses a comb filter with a frame memory and ideally separates the Y luminance and color signal for still parts of a picture thus providing a clean pic ture without 1 Dot interference causing at border areas of color pic tures 2 Excess color in vertical direction However in a moving picture as the picture moves between the first and second frames good separation is no...

Page 58: ...2V p p 9V 0 5V 0 6V p p at burst GND 2V p p 5V 0 5V 0 4V p p 3 58 MHz IIC bus data 5V IIC bus clock 5V Fig 7 1 3 dimension Y C separator unit block diagram DH DC DD DG DF DI DJ DE DB DA 36 48 51 56 28 20 19 AMP LPF AMP LPF LPF QZ21 LZ20 etc QZ22 QZ23 LZ21 etc LZ23 etc QZ24 KILL YOUT COUT CVIN FSC DATA SLK PZ01 QZ01 TC9090N QZ06 QZ02 QZ03 QZ04 TA8667F LZ25 28 6MHz 8 FS2N QZ05 QZ07 QZ14 QZ16 64 100 ...

Page 59: ...OUTPUT FEEDBACK DEFLECTION YOKE V RASTER SHIFT CIRCUIT AUTO LIVE MICROPROCESSOR I2C BUS I2C BUS Q501 TA1222AN V C D LSI WAC V BLK Fig 8 1 Vp S Switch Differential amplifier C2 R3 V2 c R1 C2 R2 a V1 L A 1 1 Theory of Operation The purpose of the V output circuit is to provide a sawtooth wave signal with good linearity inV period to the deflection yoke When a switch S is opened an electric charge ch...

Page 60: ...rigger pulse enters pin 13 it is differentiated in the waveform shape circuit and only the falling part is detected by the trigger detection circuit to the waveform generation circuit is not susceptible to variations of input pulse width 13 14 15 16 5Vp DC 0V WAVEFORM SHAPE TRIGGER DET PULSE GAIN V LAMP AGC 9V R329 C321 C322 C323 Fig 8 4 The pulse generation circuit also works to fix the V ramp vo...

Page 61: ...R305 C306 DY Q4 These operations are shown in Fig 8 5 V 3 V 7 V 2 1 4 2 7 3 6 Q2 Q4 BIAS CIRCUIT Q3 Q301 35V D301 C308 D308 D309 R308 DY C306 R305 Q3 ON Q4 ON GND GND 63V 35V GND 35V GND 63V 2 In Fig 8 6 a the power Vcc is expressed as a fixed level and the positive and negative current flowing into the deflection yoke is a current d current b c in Fig 8 6 and the emitter voltage of Q3 and Q4 is e...

Page 62: ... nected to the ground for the scanning period the power supply pin 3 of the output stage shows a voltage of VCC VF and C308 is charged up to a voltage of VCC VF VR for this period 7 First half of flyback period Current flows into L462 L465 L464 D1 C308 D308 VCC 35V GND R305 C306 L462 L463 L464 in this order and the voltage across these is VP VCC VF VCC VF VR VF about 63V is applied to pin 3 In thi...

Page 63: ...y To prevent this the stop of theV deflection is detected when the horizontal one line occurs and the video signals are blanked out so that the electron beams are not emitted When the V deflection circuit is operating normally a sawtooth wave voltage is obtained across R305 so Q350 repeats on off operation in cycle of V sync In this case the collector voltage of Q35 is set to develop less than 12V...

Page 64: ...voltage across a resistor of T370 will also increase Fig 8 11 When the voltage increases across R370 and the voltage developed across R371 becomes higher than the Vbs of Q370 Q370 turns on and a voltage develops across R374 due to the collector current flowing When this voltage increases to a value higher than about 7V Z801 operates thus cutting off the power relay When the circuit operates a powe...

Page 65: ...ay occur when performing the search operation and the vertical position adjustment of a VTR Raster position Nomal mode 4 3 Full Dramatic Wide Mode in which the opposite current flows into D Y Cinema Screen mask position Screen mask position Fig 8 13 So adjust the center of the picture to the center of the screen in advance under the output V sync delayed To do this lower the raster position by flo...

Page 66: ... to the base and heavy base current ib must be flown On the contrary to completely turn off the transistor a sufficiently high reverse voltage must be applied to the base 3 When the transistor is on collector current is maxi mum condition with the sufficiently high forward volt age applied to the base the transistor can not be turned off immediately if a reverse base bias is applied to the base be...

Page 67: ...ecause of the off drive system employed 2 On the contrary when Q1 inside IC501 is off pin 8 is 0V base emitter bias of Q402 becomes 0V and Q402 turns off and a collector pulse as shown in Fig 9 3 develops at the collector The voltage is stepped down and Q404 is forward bi ased with this voltage thus turning on Q404 3 In this way by stepping down the voltage developed at primary winding of the driv...

Page 68: ...sed by the circuit shown in Fig 9 5 a That is the transistor can be turned on or off by applying a pulse across the base emitter A forward switching cur rent flows for on period and a reverse switching cur rent flows through the diode for off period This switch ing is automatically carried out The diode used for this purpose is called a damper diode Fig 9 5 a H output basic circuit b H output equi...

Page 69: ...s process 5 t4 When the discharge is completed the voltage reduces to zero and the deflection current reaches maximum value in re verse direction The t2 t4 is the horizontal flyback period and the electron beam is returned from right end to the left end on the screen by the deflection current stated above The operation for this period is equivalent to a half cycle of the resonant phenomenon with L...

Page 70: ...o sup press this expansion at the screen circumference it is necessary to set the deflection angle q1 to a large value rapidly deflecting the electron beam at the screen center area and to set the deflection angle q2 to a small value scanning the electron beam slowly at the cir cumference area as shown in Fig 9 7 In the horizontal output circuit shown in Fig 9 8 ca pacitor CS connected in series w...

Page 71: ...e screen left side ex panded right side compressed When a horizontal linearity coil L1 with a current char acteristic as shown in Fig 9 9 c is used left side pic ture will be compressed and right side picture will be expanded because the inductance is high at the left side on the screen and low at the right side The left right asymmetrical correction is carried out in this way and pictures with go...

Page 72: ...ows circuit diagram Video ripple in video out put circuit power supply 200V suffers DC cut by C475 and is inverted in Q470 then input to pin 24 of Q501 via C481 Pin 24 of Q501 is a bending correction terminal The volt age which is applied to this terminal controls phase of video signal to correct white peak bending Q501 24 Bending correction terminal EHT C415 93 Receiving Board Power Def board BB9...

Page 73: ... Fig 9 12 the flyback period of the AFC pulse in the FBT starts at a negative side from 0V To detects this the DC component is cut with C493 This is C493 is always charged through D487 with a negative side about 17V of theAFC pulse As a result a voltage at point A in the waveform rises from the ground level This wave form is sliced in a circuit R486 D486 to detect the flyback period Thus obtained ...

Page 74: ...om the 200V line Accordingly Q340 col lector is kept at about 6 2V or the zener voltage of D341 and Q341 is turned off If some abnormality occurs and 200V line voltage lowers by less than about 160V Q340 turns off and its collector voltage rises So Q341 turns on With Q341 turned on the voltage at pin 14 of Z801 expander exceeds a threshold voltage and pin 16 of Z80 is high level and makes the powe...

Page 75: ...izontal output cir cuit with the FBT and supplies the power to various cir cuit 5 1 Theory of Operation 10 9 4 7 6 3 2 1 5 Auxiliary winding Primary winding AFC blanking Heater 35V 27 5V 210V 125V C310 C303 D302 C460 D460 R327 R469 D406 C446 C448 Q404 C463 T401 CRT anode ABL H deflection coil L462 L463 L464 R441 C423 L441 1040V p p 1H 15 625kHz R444 R443 Focus pack D408 C447 R448 12V 1 DPC CIRCUIT...

Page 76: ...g 9 17 125V 0 10 4 7 6 2 1 0 0 0 For 12V 35V G F E D C B A E D C B A G F Primary Auxiliary Picture tube anode EO ABL EH Pulse Stacked pulse of 4 block 1H 15 735KHz Picture tube capacitor Fig 9 18 5 2 Operation Theory of the Harmonic Non Resonant System and Tuned Waveforms The high voltage coil is of film multi layer winding type and the coils are isolated into seven blocks Each block is connected ...

Page 77: ...wers up to a VCE saturation voltage of Q1 Then VCP2 is not clamped by D2 with the voltage at the point B Since the VCP is expressed as a sum of VCP1 and VCP2 as shown by equation 3 VCP decreases by amount the VCP2 is decreased This varies the high voltage Q1 collector current is controlled by Q1 base current which is an output of the comparison inverted amplifier That is the Q1 base current is con...

Page 78: ...of the high voltage transistor Q480 increases As a result Q480 collector current increases and Q480 col lector voltage at the point B decreases Then a peak value of VCP2 across C418 is clamped by the diode D443 at the collector voltage lowered and the collector voltage VCP of Q404 H output transistor obtained as a sum of the voltage VCP1 across C443 and VCP2 across L418 decreases Then the high vol...

Page 79: ...cuit mal function there is possible danger that X RAY leakage in creases to affect human body To prevent it X RAY protec tion circuit is equipped 7 2 Operation Figure 9 23 shows the circuit diagram Supposing high volt age rises abnormally due to some reason pulse at pin 9 of T461 also rises and detection voltage ED rectified by D471 and C471 in X RAY protection circuit rises When ED rises emitter ...

Page 80: ...ctor module Z801 becomes approx 0 7V or more Tr8 turns on and the voltage by divided ratio of R15 and R16 is applied to cathode of ZD4 When this voltage becomes higherthanzenervoltageofZD4 ZD4turnsontosupplybase current to base of Tr6 via R14 This causes Tr5 ON and voltage at pin 16 of Z801 becomes low Therefore QB30 and Q843 turns off to set SR81 OFF Tr6 and Tr7 in Z801 are in thyristor connectio...

Page 81: ...crocomputer and can be con trolled with the remote control 1 2 Functions and Features The IC has functions of V RAMP voltage generation V amplitude automatic switching 50 60 Hz V linearity cor rection V amplification EHT correction side pincushion correction I2C bus interface etc and controls following items through the I2C bus lines 1 V amplitude 2 V linearity 3 V S character correction V Trigger...

Page 82: ...scillation adjust ment Fig 10 2 shows a basic circuit of the diode modulator used in the N5SS A key point in the modulation circuit shown in Fig 10 2 is to develop a negative pulse at point B In this circuit a current loop of the resonant circuit for flyback period is shown by an arrow and the energy stored in LDY is transferred to resonant capacitors Cr Crm in passing through Cr Crm CS when the s...

Page 83: ...tored in the pri mary winding of the FBT is transferred to the resonant ca pacitor in the form of IP In this case the current path is also split into two IP1 passing through C1 and IP2 passing through C2 C3 Concequently the current differences be tween IY1 and IP2 IY1 IP2 passes through C3 When the high voltage current IH reduces with a dark pic ture the current IP in the primary circuit decreases...

Page 84: ...eriod When the base drive current decreases and the H OUT tran sistor is turned off each energy stored in LDY Lm LP of FTB is transferred to C1 C2 and C3 respectively and the resonant current becomes zero at a center of the flyback pe riod Then VA and VB pulses show a maximum amplitude H OUT VA FBT LDY lP Cs VB VB DM IM LM IDC CSM IY VA FBT LDY lP Cs VB VB IM LM IDC CSM IY IY2 IP2 C2 C1 IP1 Fig 10...

Page 85: ...omes the maximum 3 1 4 First Half of Scanning Period When the flyback period completes the damper diode DD and the modulation diode DM turn on and the IY and IM proportionally decrease from the maximum value to zero The H OUT transistor is turned on just preceding at the center of the scanning period and repeats the steps 3 1 1 through 3 1 4 stated above IP1 IP2 C1 C2 VA L O P T IY IY2 LDY IP CS V...

Page 86: ...r is amplified and wave form shaped by Q715 Q717 and Q719 and comes out from the unit The clock signal for the PLL is adjusted by L719 to a refer ence frequency of 32 0 1MHz under no input status A test pattern generator is also built inside Q701 and devel ops R G B signals and a Ys switching signal 2 2 Circuit Description 1 With the power turned on the unit is reset and enters an operation standb...

Page 87: ...r Filter Filter Filter D A D A D A R G B Ys RAM 8 8 12bit 3 Q715 Q717 Q719 Q705 Q704 Q703 GH GV BH BV RV RH Counter PLL HD VD Q707 Q719 32MHz Q767 M CON DATA CLK RESET R716 C711 E 2 PROM MEMORY Q701 T7K64 Load Save Q713 Main bus line Test pattern ...

Page 88: ...store the modi fied total data on RAM as correct one into Q713 E2PROM The adjustment is carried out for each screen mode and its order is as follows Normal Full Theater Wide 1 the ater Wide 2 Theater Wide 3 When the adjustment value is saved after adjusting Normal Full the microprocessor cal culates the adjustment values for Theater Wide 1 2 and 3 based on the adjustment value of Normal Full mode ...

Page 89: ...er right of the screen When the MENU key is pressed again the service data is displayed on the upper left on the screen When 7 key on the remote controller is pressed in this sta tus the screen changes to display the cross hatch screen the first screen described later and the convergence adjustment screen appears When 7 key is pressed again the data storing operation is automatically carried out a...

Page 90: ...ection waveform is mute for 1 second The modified data for this period is sent to Q713 E2PROM from Q071 RAM and then stored The second screen is displayed upper left of the first screen so the convergence adjustment cannot be carried out when the second screen is displayed Note The adjusted data is automatically stored when the dis play changes from the first screen to the second screen So be sure...

Page 91: ...TE 1 ENTER TOSHIBA 100 TV CABLE VCR 1 2 3 4 7 9 4 5 3 6 8 10 1 2 100 Key 0 Key ENT Key 5 Key 5 6 7 8 9 10 8 Key 2 Key 6 Key 4 Key 3 Key 7 Key Red test pattern ON OFF Green test pattern ON OFF Blue test pattern ON OFF Cursor shift data change mode chang over Cursor down adjusting point down Cursor UP adjusting point UP Cursor right adjusting point right Cursor left adjusting point left Cursor color...

Page 92: ...n by pressing 8 4 and 6 3 3 Each Screen Adjustment Method 3 3 1 Normal Full B 2 B 2 14xB 2mm 12xA 40 inches 16 9 Screen size Horizontal 885mm x Vertical 498mm Dimension A 73 5mm Dimension B 33 2mm Screen frame 2mm Fig 11 6 8 When the adjusting position is determined press 5 key on the remote controller to enter the cursor blink ing status 9 Set the cursor to the adjusting position by pressing 2 8 ...

Page 93: ...5 249 213 103 5 0 115 217 5 249 7 5 Screen center 40 inches 16 9 Screen size Horizontal 885mm x Vertical 498mm 0 605 495 5 289 5 93 5 348 5 298 144 0 159 303 348 5 10 Screen center 93 5 289 5 495 5 605 56 inches 16 9 Screen size Horizontal 1239mm x Vertical 697mm Fig 11 8 ...

Page 94: ...5 362 5 72 5 72 5 217 5 362 5 435 Screen center 40 inches 16 9 Screen size Horizontal 885mm x Vertical 498mm 128 1 256 2 298 9 0 0 618 309 515 103 Screen center 56 inches 16 9 Screen size Horizontal 1239mm x Vertical 697mm 180 9 301 5 361 8 103 309 515 618 180 9 301 5 361 8 ...

Page 95: ... 435 217 5 362 5 72 5 72 5 217 5 362 5 435 Screen center 40 inches 16 9 Screen size Horizontal 885mm x Vertical 498mm 0 0 618 309 515 103 Screen center 56 inches 16 9 Screen size Horizontal 1239mm x Vertical 697mm 379 2 325 162 5 162 5 325 379 2 103 309 515 618 Fig 11 12 ...

Page 96: ...e color matching in terms of the convergence for each screen In this case do not move the green 7 After completion of the convergence adjustment for each screen replace the green CRT For the green CRT repeat the steps 2 5 to make the color matching in terms of the convergence by using the red and blue as the reference 4 2 When Convergence Unit is Replaced When replacing the convergence units all s...

Page 97: ...T Cut off Lens focus Electrical focus Yoke horizontal User convergence enter check Centering Convergence adjustment White balance End User convergence enter check Centering Convergence adjustment End 5 2 Adjusting Procedure in Replacing Convergence Unit Main Def ...

Page 98: ...Pump up source CONV OUT IC Q752 H Pin 10 15V H PV Pin 5 30V By HD input signal pump up is done only in horizontal re tracing time 6 2 4 CONV OUT mute In power on operation transistors Q765 and Q766 are made turned ON and 15V is applied to pin 3 of CONV OUT IC These cause mute operation on CONV OUT 6 2 5 Operation of IC 1 Q764 TC74HC4050AP Sync signal which is input from P711 1 VD 2 HD is through b...

Page 99: ...15V B V G V R V C7765 MUTE 5 10 9 8 4 3 11 12 18 17 Q765 5 10 9 8 4 3 11 12 18 17 CONV OUT CONV OUT 1501 H PU H Q752 STK392 110 V H Q751 STK392 110 P715 GREEN V H P714 BLUE V H P713 RED C7771 HD Q769 Q770 Q771 PUMP UP 15V D7702 D7701 Q757 5V 1 PROTECTOR R7782 0 82Ω 30V R7750 0 33Ω 15V R7765 0 39Ω 15V CONVER YOKE VD HD I CS SDAM SCLM GND DFAI 2 1 2 3 4 5 6 GND INCS SCLU SDAU GND GND 1 2 3 1 2 3 4 5...

Page 100: ...on sound at power on No Convergence correction wave Check screen modes of picture Convergence PCB pull out of P712 Check power supply circuit Check Q751 Q752 and repair Reray OFF Proceed to protection circuit diagnosis procedures Check P708 R G B correction wave Check voltage at 15V 30V pump up Check power supply circuit Are output signals applied to H Vblk of P711 Check DEF PC13 Check voltage acr...

Page 101: ...P EXT SP L FRONT EXT SP R FRONT FRONT 200V BLK V S M 125V 12V DRIVE RETURN S V M UNIT L472 R L473 G L474 B V M COIL ORT DRIVE RED UNIT V901 PICTURE TUBE RED V902 PICTURE TUBE GREEN V903 PICTURE TUBE BULE 30 7kV 30 7kV 30 7kV ORT DRIVE GREEN UNIT ORT DRIVE BULE UNIT V H DEF YORK L462 L463 K464 Z410 R G B R G B TO CRT FOCUS G4 TO CRT SCREEN G2 FUCAS PACK DOF Eo AC120V 60Hz F801 125V7A LINE FILTER TR...

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Toshiba TW40F80, Technical Training Manual

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