56
Dout (X8)
OE
RE
RSTR
SRCK
Data - out
buffer (X8)
Serial
Read
Controller
512 Word serial read register (X8)
Read line buffer
Low-Half (X8)
Read line buffer
High-Half (X8)
71 Word
Sub-register (X8)
71Word
Sub-register (X8)
256K (X8)
Memory
Array
X
De-
coder
Read/Write
and refresh
controller
Clock
oscillator
Write line buffer
Low-Half (X8)
Write line buffer
High-Half (X8)
512 Word serial write register (X8)
256 (X8)
256 (X8)
256 (X8)
256 (X8)
Serial
Write
Controller
Data - in
Buffer (X8)
VB3
Generator
Din (X8)
IE
WE
RSTW
SWCK
WE
Din0
Din2
Vcc
Din5
Din7
SWCK
NC
OE
Dout6
Dout4
Dout3
Dout1
RSTR
IE
Din1
Din3
Din4
Din6
RSTW
NC
RE
Dout7
Dout5
Vss
Dout2
Dout0
SRCK
28PIN ZIP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
Terminal name
Function
SWCK
Serial write clock
SRCK
Serial read clock
WE
Write enable
RE
Read enable
IE
Input enable
OE
Output enable
RSTW
Reset write
RSTR
Reset read
Din 0 – 7
Data input
Dout 0 – 7
Data output
V
CC
Power supply (+5V)
V
SS
Ground (0V)
NC
Not connected
Fig. 6-9 QY10/QY11 M518221-30ZS internal block diagram
Fig. 6-10 QY10/QY11 M518221-30ZS pin layout
