5-4. Digital Circuit Diagram
Digital Circuit System Diagram
Fig. 5-5-4
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3
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5
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2
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5
N
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2
1
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P
G
-
E
T
U
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_
N
I
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D
I
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2
L
E
S
e
m
a
N
N
O
_
C
I
M
7
1
_
O
I
C
P
G
9
4
N
I
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1
1
_
O
I
C
P
G
8
4
N
I
P
L
M
C
M
6
1
_
O
I
C
P
G
3
1
_
O
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C
P
G
4
1
_
O
I
C
P
G
T
E
D
_
S
P
V
_
N
I
_
O
E
D
I
V
3
L
E
S
0
2
N
I
P
1
P
J
1
S
F
_
T
R
A
C
S
2
3
N
I
P
Vaddis V
Vaddis V
B_U
R_V
G_Y
AT
IORDY
ATIO
W
-
ATINTRQ
ATCS0
-
ATCS1
-
ATIO
R-
ATDM
ACK-
ATDA0
RESET-
27MHZ_OSC
ALRCLKO
ABCLKO
SCL
SDA
A
T
D
D
[0.
.15]
ATDA1 ATDA2
ATDM
ARQ
VADDIS_AMCLK
VIDVLD
SPDIF
C
DRVRST
-
MC
VIDHS
ADC_ADAT
ML
VIDCLK
MD
VID[7..0]
VIDEO_IN_SEL2
VIDVS
CVBS
AOUT0
Y
SBREQ
SBDAT
SBCLK
SBVALID
I54_DUPTD
I54_DUPRD
I55_AODAT
I55_GPIO2
I55_GPIO0
MUTE-
VIDEO_IN_SEL
GND
D5V
+3.3V
+1.8V
VDD_DAC
I55_RESET-
I55_ALRCLK
I55_ABCLK
I55_AMCLK
SAP_MUTE
FPCDOUT
FPCDIN
FPCCLK
FPCSTB
IRRCV
HDMI_27MHZ_OSC
A150_VIDO_[0..7]
A150_VIDO_HS
A150_VIDO_VS
A150_VCLKOx2
HD_SDA
HD_SCL
AFC_OUT
HDMI
HDMI
RESET-
HDMI_27MHZ_OSC
+1.8V
+3.3V
A150_VIDO_HS
A150_VIDO_VS
A150_VCLKOx2
A150_VIDO_[0..7]
A12V
VDIFGND
A150_SPDIFO
SCL
SDA
HD_SDA
HD_SCL
GND
VOGND
Audio & Video Input_1
Audio & Video Input
SAP_MUTE
SDA
SCL
I55_CIN
I55_YIN
I55_CVBSIN
VIDEO_IN_SEL
A5V
AGND
AR_
R
EAL
AL
_R
EAL
AL
_F
RONT
AR_
F
RONT
VIDEO_IN_SEL2
AR_
T
V
A
L_T
V
VGND
AFC_OUT
Activa100
Activa100
GBADR[9:0]
GBDAT[15:0]
27MHZ_OSC
I55_RESET-
H_STROBE-
H_WR-
VID[7:0]
VIDVS
VIDHS
VIDCLK
VIDVLD
SBVALID
SBDAT
SBCLK
SBREQ
I55_RX0
I55_TX0
LINK_CS-
LINK_IRQ
I55_GPIO0
I55_GPIO2
I55_A
B
C
LK
I55_A
LR
C
LK
I55_A
M
C
LK
I55_A
O
D
A
T
ISOCLK
ISORDY
ISOD[7:0]
ISOVALRX
ISOSTART
ISOVALTX
ISODIR
+3.3V
+1.8V
GND
VGND
I55_CVBSIN
I55_YIN
I55_CIN
D5V
ADC_
ADAT
GB_ACK#
AUDIO OUTPUT_1
AUDIO OUTPUT
MUTE-
ML
MC
MD
AOUT0
ALRCLKO
ABCLKO
VADDIS_AMCLK
SPDIF
+3.3V
GND
AGND
A5V
AL
_R
EAL
AR_
F
RONT
AL
_F
RONT
AR_
R
EAL
A
L_T
V
AR_
T
V
I55_AMCLK
I55_ALRCLK
I55_ABCLK
ADC_ADAT
5SB
A12V
A-12V
AUDIO_OUT_L
AUDIO_OUT_R
ATAPI INTERFACE
ATAPI INTERFACE
ATCS0
-
A
T
D
D
[0.
.15]
DRVRST
-
ATINTRQ
ATDA0 ATDA1
ATDM
ACK-
ATIO
R-
ATIO
W
-
ATDM
ARQ
AT
IORDY
ATCS1
-
ATDA2
GND
D5V
VIDEO OUTPUT_1
Video Output
C
Y
G_Y
CVBS
R_V
B_U
+3.3V
V_GND
AUDIO_OUT_R
AUDIO_OUT_L
AGND
1394
1394
GBADR[9:0]
+3.3V
GND
ISOD[7:0]
GBDAT[15:0]
ISOSTART
ISOCLK
ISORDY
ISOVALRX
LINK_IRQ
LINK_CS-
H_WR-
H_STROBE-
ISOVALTX
ISODIR
RESET-
I55_RESET-
GB_ACK#
+1.5V
POWER
POWER
A12V
A-12V
A5V
+1.8V
GND
+3.3V
D5V
VDD_DAC
5SB
+1.5V
RESET-
ATDM
ARQ
B_U
C
ATCS0
-
ATDM
ACK-
ATIO
W
-
ATDA1
A
T
D
D
[0.
.15]
AT
IORDY
ATDA2
ATDA0
ATIO
R-
ATCS1
-
Y
CVBS
DRVRST
-
ATINTRQ
AOUT0
MC
MD
ML
RESET-
SAP_MUTE
IRRCV
FPCDOUT
FPCDIN
FPCCLK
FPCSTB
ALRCLKO
I55_C
IN
I55_Y
IN
I55_C
VBSIN
GBDAT[15:0]
I55_GPIO2
I55_GPIO0
ISOD[7:0]
VIDCLK
VID[7..0]
H_STROBE-
ISOVALTX
VIDVLD
LINK_CS-
ISOSTART
SBVAILD
ISORDY
SBDAT
ISOVALRX
GBADR[9:0]
ISODIR
VIDVS
I55_RESET-
ISOCLK
LINK_IRQ
SBREQ
SBCLK
VIDHS
H_WR-
27MHZ_OSC
ADC_ADAT
VIDEO_IN_SEL
I55_AODAT
I55_AMCLK
SDA
I55_ALRCLK
CVBS
I55_ABCLK
I55_RESET-
C
Y
G_Y
SCL
FPCDOUT
FPCCLK
VIDEO_IN_SEL2
SPDIF
G_Y
R_V
FPCDIN
IRRCV
FPCSTB
MUTE-
ABCLKO
VADDIS_AMCLK
GB_ACK#
RESET-
VIDEO_IN_SEL2
MUTE-
G_Y
SDA
B_U
I55_CIN
MD
ML
VIDEO_IN_SEL
MC
I55_YIN
SCL
Y
CVBS
R_V
SAP_MUTE
C
I55_CVBSIN
SCL
SDA
HD_SDA
HD_SCL
SPDIF
A150_VCLKOx2
A150_VIDO_VS
A150_VIDO_HS
HDMI_27MHZ_OSC
RESET-
HDMI_27MHZ_OSC
A150_VIDO_[0..7]
A150_VIDO_[0..7]
A150_VIDO_VS
A150_VIDO_HS
A150_VCLKOx2
HD_SCL
HD_SDA
A
UDI
O_
OUT
_R
A
UDI
O_
OUT
_L
AFC_OUT
AFC_OUT
SCK
DATA
RDY_FM
HOST_RST
IR
R_V
B_U
I55_AMCLK
ADC_ADAT
ABCLKO
SPDIF
I55_ALRCLK
ALRCLKO
VADDIS_AMCLK
AOUT0
I55_ABCLK
A5V
A12V
+1.8V
A-12V
+3.3V
D5V
D5V
+3.3V
+3.3V
VDD_DAC
+3.3V
D5V
VGND
+1.8V
+1.8V
VDD_DAC
D5V
5SB
V_GND
+1.5V
+1.5V
VGND
A5V
5SB
A5V
+3.3V
V_GND
A12V
+3.3V
VGND
A-12V
VOGND VDIFGND
+3.3V
+1.8V
A12V
V_GND
R136 33R
CN508
6 PIN
1
2
3
4
5
6
R47
75R/1%
C36
1nF
R45
75R/1%
R44
75R/1%
R135 33R
R138 33R
R49
75R/1%
R134 33R
TP36
TP34
C77
100pF
R12
0R(0805)
R48
75R/1%
R132 33R
TP37
C78
100pF
TP35
TP38
R24
0R(0805)
C79
100pF
C76
100pF
R137 33R
R46
75R/1%
