TMC AI5VG+, User Manual

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Chapter 5 Installation
AI5VG+ User’s Manual 13
Chapter 4 Hardware Settings
The following sections describe the necessary procedures and proper
jumper settings to configure the AI5VG+ motherboard.
4.1 SW1(1-8): CPU Frequency Selector ......................................... 15
4.2 JP1, SW1(4): DRAM Operating Frequency (AI5VG+-100)..... 20
4.3 JP6: System Frequency Divider (AI5VG+-100) ....................... 20
4.4 SW2(1-4): CPU Voltage Selector ............................................. 20
4.5 JP2: Clear CMOS Selection ...................................................... 22
The AI5VG+-100MHz supports VIA’s MVP3 chipset and has a
maximum CPU bus speed of 100MHz. Please note the correct settings of
both the CPU and SDRAM clocks.
For the locations of the jumpers, refer to Figure 2 on the following page.
The following examples show the conventions used in this chapter
Jumper Open
Jumper Closed
Switch 1 and switch 2 are set to OFF.
Switch 3 and switch 4 are set to ON.