4-7
Themis Computer
4—Universe II Description
VMEbus Interface
4.2.4.2 Register Access at Power Up
Register access at power up is used in a system where either the Universe II is inde-
pendent of the local CPU or a CPU is not present. Since the Universe II and the
Turion64 are present on the TA64, register access at power up is not supported.
4.2.5
Universe II’s Hardware Power-Up Options
The Universe II power up options are determined right after the PWRRST* based on
the level of VMEbus Address VA[31..1] and VMEbus Data VD[31..27]. See
Table
4-3
, page 4-8, for the Universe II’s power up options on the TA64.
The Universe II is automatically configured at power up to operate in the default
configuration listed in
Table 4-2
. It should be noted that all power up options are
latched only at the positive edge of PWRRST*; they are loaded when SYSRST*,
PWRRST*, and RST* are negated.
Table 4-2.
Universe II Power Up Options
Option
Register
Field
Default
Pins
VMEbus Register Access
Slave Image
VRAI_CTL
EN
Disabled
VA[31]
VAS
A16
VA[30..29]
VRAI_BS
BS
0x00
VA[28..21]
VMEbus CR/CSR Slave
Image
VCSR_CTL
LAS[0]
a
Memory
VA[20]
VCSR_TO
TO
0x00
VA[19..15]
Auto-ID
MISC_STAT
DY4AUTO
Disabled
VD[30]
MISC_CTL
V64AUTO
Disabled
VD[29]
VINT_EN
SW_INT
0
VINT_STAT
SW_INT
0
VINT_MAP1
SW_INT
000
BI-Mod
MISC_CTL
BI
Disabled
VD[28]
AUTO_SYSCON Detect
MISC_CTL
SYSCON
Enabled
VBG3IN*
SYSFAIL* Assertion
VCSR_SET
SYSFAIL
Asserted
VD[27]
VCSR_CLR
SYSFAIL
--
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Summary of Contents for TA64
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