Texas Instruments UCC27517 User Manual Download | Manualshive

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Fusion Power Peripheral

AD_03

AD_07

DPWM1

PI

(Gv)

+

+

-

-

UCD3138

Vref

Vb

Ev

Iin

CLA1

(Gc)

Calculate

Vrms

Calculate

1/Vrms

2

Iref

A

B

c

Ui

Vrms

Conditioning

&

Rectification

Km

FE0

DPWM1B

Vbus_sen

Vin_N

I

_shunt

EAP0

UART

Interface

Vin_L

AD_08

Cycle by cycle limit

Vbus_ov

COMP_F

OVP

PMBus

Interface

Single-phase PFC
Configuration

COMP_ D

I_CT1

Digital PFC Description

12.2 UCD3138 Pin Definition

In this EVM, the PFC DC bus voltage feedback loop control is implemented using firmware execution by
the ARM7 microcontroller, while the high-speed current loop control is implemented in the digital power
peripherals in the UCD3138. The DC bus voltage, AC line and AC neutral voltages are sensed using the
general purpose ADC in the ARM block. This is executed while the current signal is sensed and
processed using the Front-End (EADC) block in the digital power peripherals. All protection functions such
as cycle-by-cycle current limiting and overvoltage protection are implemented using the high-speed analog
comparators available in the UCD3138.

12.2.1

UCD3138 Pin Definition in Single-Phase PFC

UCD3138 is a 64-pin device. When using the UCD3138 as a single-phase PFC controller, the pins used
are defined in

Figure 28. Definition of UCD3138 in Single-Phase PFC Control

27

SLUU885B – March 2012 – Revised July 2012

Digitally Controlled Single-Phase PFC Pre-Regulator

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Copyright © 2012, Texas Instruments Incorporated

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Summary of Contents for UCC27517

Page 1: ...Using the UCD3138PFCEVM 026 User s Guide Literature Number SLUU885B March 2012 Revised July 2012 ...

Page 2: ...ble high voltages may be present for the purpose of protecting inadvertent access d All interface circuits power supplies evaluation modules instruments meters scopes and other related apparatus used in a development environment exceeding 50 VRMS 75 VDC must be electrically located within a protected Emergency Power Off EPO protected power strip e Use a stable and non conductive work surface f Use...

Page 3: ...om firmware with user s definition and development The EVM system is in topology of single phase boost converter at its delivery on both hardware and firmware but can be re configured into two other PFC topologies dual phase interleaved and bridgeless then corresponding operation can be made by reloading with that associated firmware All necessity of hardware and firmware for the two additional to...

Page 4: ...ase Universal AC Line Power Factor Correction Pre Regulator Servers Telecommunication Systems 2 2 Features Digitally Controlled PFC Pre Regulator Universal AC Line Input from 90 VAC to 264 VAC with AC Line Frequency 47 Hz to 63 Hz Regulated Output 390 VDC with Output from No Load to Full Load Full Load Power 360 W or full Load Current 0 92 A High Power Factor Close to 0 999 and Low THD Below 5 in ...

Page 5: ...83 Power factor Half load 0 99 THD input current 10 to 30 full load 10 30 to 100 full load 5 Output Characteristics Output voltage VOUT No load to full load 390 VDC Output load current IOUT 90 VAC to 264 VAC 0 92 A Output voltage ripple Full load and 115 VAC 60 Hz 13 Vpp Full load and 230 VAC 50 Hz 15 Output over current 0 95 A Systems Characteristics Switching frequency Normal operation 100 kHz P...

Page 6: ...6156 2 C9 0 1uF C14 0 1uF 1 EN 2 C1 3 V 4 C1 5 C2 6 C2 7 V 8 R1IN 9 R1OUT 10 INVALID 11 T1IN 12 FORCEON 13 T1OUT 14 GND 15 VCC 16 FORCEOFF U2 SN75C3221DBR 1 2 3 4 5 6 7 8 9 10 11 J9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 J3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38...

Page 7: ... MBR0530 L1 327uH C33 47nF R46 100k R67 100k R59 49 9k U3 OPA350EA D8 BAT54C R2 3 3M R58 2k D23 BAT54S R12 100k D16 6A6 T 1 N C 2 INA 3 GND 4 INB 5 OUTB 6 VDD 7 OUTA 8 N C U4 UCC27324D R65 10k HS2 Q2 IPP60R199CP 8 7 3 1 T2 PA1005 050 C31 47uF L2 327uH Q3 IPP60R199CP 8 7 3 1 T1 PA1005 050 R26 100k R51 100k R62 100k C41 47nF D1 BAT54S C35 100pF D12 MBR0530 2 3 6 4 7 U1 OPA350EA Q5 2N7002 D17 GBU8J C...

Page 8: ... greater with display such as load current and load power Oscilloscope capable of 500 MHz full bandwidth digital or analog if digital 5 Gs s or better Current probe capable of 0 A to 10 A 100 MHz or greater full bandwidth AC coupling Fan 200 LFM to 400 LFM forced air cooling is recommended but not a must Recommended Wire Gauge capable of 4 A RMS or better than 16 AWG with the total length of wire ...

Page 9: ...p Figure 4 EVM Orientation of UCD3138PFCEVM 030 on the UCD3138PFCEVM 026 9 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 10: ... Drain pin TP24 SW1 Q3 Drain pin TP25 Q2 Gate Gate pin of Q2 MOSFET TP26 Q3 Gate Gate pin of Q3 MOSFET 7 List of Terminals Table 3 List of Terminals TERMINAL NAME DESCRIPTION J1 Line Board AC input line single pin connection screw type J1 and J2 are AC input terminals rated up to 264 VAC and maximum 7 5 A 47 Hz to 63 Hz J2 Neutral Board AC input neutral single pin connection screw type J3 DJ Digit...

Page 11: ...ltage in the range specified in Table 1 between 90 VAC and 264 VAC between 47 Hz and 63 Hz set up the AC source current limit to 7 5 A peak and RMS respectively 6 Connect an electronic load with either constant current mode or constant resistance mode The load range is from 0 A to 0 92 A Initial power on is recommended with 0 A load current The load is required to receive 0 VDC to 500 VDC 7 If the...

Page 12: ... com 9 Performance Data and Typical Characteristic Curves Figure 5 through Figure 18 present typical performance curves for UCD3138PFCEVM 026 9 1 Efficiency Figure 5 UCD3138PFCEVM 026 Efficiency 9 2 Power Factor Figure 6 UCD3138PFCEVM 026 Power Factor 12 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 13: ...ic Curves 9 3 Input Current at 115 VAC and 60 Hz Figure 7 Input Current and Voltage 115 VAC and Half Load Figure 8 Input Current and Voltage 115 VAC and Full Load 13 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 14: ...and 50 Hz Figure 9 Input Current and Voltage 230 VAC and Half Load Figure 10 Input Current and Voltage 230 VAC and Full Load 14 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 15: ...Ripple Figure 11 Output Voltage Ripple 115 VAC and Full Load Figure 12 Output Voltage Ripple 230 VAC and Full Load 15 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 16: ...ut Turn On Figure 13 Output Turn On 115 VAC and No Load Figure 14 Output Turn On 115 VAC and Full Load 16 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 17: ...igure 15 UCD3138PFCEVM 026 Input Current THD 9 8 Other Waveforms Figure 16 UCD3138PFCEVM 026 Sensing Signal AC_L TP14 or AC_N TP7 17 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 18: ...e 17 UCD3138PFCEVM 026 Sensing Signal ISENSE TP20 Figure 18 UCD3138PFCEVM 026 MOSFET VGS top and VDS 18 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 19: ...imensions L x W 9 0 inch x 6 0 inch PCB material FR4 or compatible four layers and 2 oz copper on each layer Figure 19 UCD3138PFCEVM 026 Top Layer Assembly Drawing top view Figure 20 UCD3138PFCEVM 026 Bottom Assembly Drawing bottom view 19 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorpo...

Page 20: ...CD3138PFCEVM 026 Top Copper top view Figure 22 UCD3138PFCEVM 026 Internal Layer 1 top view 20 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 21: ...D3138PFCEVM 026 Internal Layer 2 top view Figure 24 UCD3138PFCEVM 026 Bottom Copper top view 21 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 22: ...0 591 inch ECQU2A474ML Panasonic 7 C4 C18 C19 Capacitor ceramic 50 V X7R 10 0 1 µF 0805 Std Std C23 C24 C27 C28 3 C5 C6 C7 Capacitor metalized polyester 250 VAC 20 4 7 nF 0 295 BFC233820472 Vishay inch x 0 730 inch 5 C8 C9 C13 Capacitor ceramic 50 V X7R 10 0 1 µF 0603 Std TDK C14 C15 9 D1 D2 D3 Diode dual Schottky 200 mA 30 V SOT23 BAT54S Zetex D4 D6 D15 D22 D23 D25 2 D11 D12 D24 Diode Schottky 50...

Page 23: ...2 Inductor toroid 327 µH vertical THT 327 µH 0 866 inch x 1 380 7804 09 0014 Nova inch Magnetics 2 L3 L4 Inductor toroid 7 8 µH at 0 A and 3 22 µH at 20 5 A 7 80 µH PA0431L Pulse 0 874 inch x 0 374 inch 1 L5 IND common mode emi suppression 7 5 A 2 mH at 1 kHz 2 PE 62917 Pulse mH 0 800 inch x 1 440 inch 3 Q1 Q4 Q5 MOSFET N channel 60 V 115 mA 1 2 Ω SOT23 2N7002 Fairchild 2 Q2 Q3 MOSFET N channel 65...

Page 24: ... 2 R64 R65 Resistor chip 1 10 W 1 10 kΩ 1206 Std std 1 R69 Resistor chip 1 10 W 1 1 6 kΩ 0805 Std Std 1 R71 Resistor chip 1 10 W 1 910 Ω 0805 Std Std 1 R78 Resistor chip 1 10 W 1 1 1 kΩ 0805 Std Std 12 R9 R10 R11 Resistor metal film 1 4 W 5 100 kΩ 1206 RC1206FR Yageo R12 R17 R18 07100KL R25 R26 R46 R51 R62 R67 2 U1 U3 High Voltage High Current Op Amp MSOP 8 OPA350EA 250 TI 1 U2 RS 232 Transceivers...

Page 25: ...se PFC function block diagram is shown in Figure 25 The digital controlled single phase PFC has the same power stage as those seen in other analog controlled devices The main difference is the line voltage is sensed then rectified inside the UCD3138 digital controller All signals interact with UCD3138 and explained in section Section 12 2 Figure 25 Digitally Controlled Single Phase PFC System Bloc...

Page 26: ...aved PFC is shown in Figure 26 The digital controlled 2 phase interleaved PFC has the same power stage seen in other analog controlled devices All signals interact with UCD3138 and are explained in section 12 2 Figure 26 Digitally Controlled 2 Phase PFC System Block Diagram 12 1 3 Bridgeless PFC Block Diagram A function block diagram of a bridgeless PFC is shown in Figure 27 The digital controlled...

Page 27: ...3138 The DC bus voltage AC line and AC neutral voltages are sensed using the general purpose ADC in the ARM block This is executed while the current signal is sensed and processed using the Front End EADC block in the digital power peripherals All protection functions such as cycle by cycle current limiting and overvoltage protection are implemented using the high speed analog comparators availabl...

Page 28: ...onditioning Rectification Km FE0 DPWM1B DPWM2B Vbus_sen Vin_n I_CT1 I_CT2 I_shunt EAP0 UART Interface Vin_l AD_08 Cycle by cycle limit Vbus_ov COMP_ F OVP PMBus Interface 2 phase interleaved PFC Configuration Digital PFC Description www ti com 12 2 2 UCD3138 Pin Definition in 2 Phase PFC UCD3138 pin definition in 2 phase interleaved PFC control shown in Figure 29 Figure 29 Definition of UCD3138 in...

Page 29: ...esistor The controller measures input and output voltages and decides the appropriate time for closure of this relay Input AC voltage is scaled and conditioned and the sensed signal is applied to the UCD3138 ADC input AD_07 and AD_08 Figure 31 also shows a DC voltage regulator D3 which converts the 12 V into 3 3 V to provide the bias for on board 3 3 V Figure 31 AC Power Filtering Inrush Current L...

Page 30: ...urrent sense amplifier U1 This is shown in Figure 32 This sensed input current signal is scaled and conditioned to a range of 0 V to 1 6 V corresponding to the range of the on chip DAC associated with the error ADC0 EADC0 In DCM mode the inductor current oscillates between the inductor and switch node equivalent capacitor As a result the inductor current goes to negative but the negative current w...

Page 31: ...MBR0530 L1 327uH C33 47nF R46 100k R67 100k R59 49 9k U3 OPA350EA D8 BAT54C R2 3 3M R58 2k D23 BAT54S R12 100k D16 6A6 T 1 N C 2 INA 3 GND 4 INB 5 OUTB 6 VDD 7 OUTA 8 N C U4 UCC27324D R65 10k HS2 Q2 IPP60R199CP 8 7 3 1 T2 PA1005 050 C31 47uF L2 327uH Q3 IPP60R199CP 8 7 3 1 T1 PA1005 050 R26 100k R51 100k R62 100k C41 47nF D1 BAT54S C35 100pF D12 MBR0530 2 3 6 4 7 U1 OPA350EA Q5 2N7002 D17 GBU8J C4...

Page 32: ...odule from the host PC over the serial port It is also used to monitor some of the parameters debug and test firmware functions Figure 33 Non Isolated PFC Module to Host PC Interface 32 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 33: ...ith another digital controller for example one used in a secondary referenced isolated DC to DC converter application Figure 34 Isolated UART and AC_DROP Signal Interface 33 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 34: ...FC board and the UCD3138 controller board is shown in Figure 35 Figure 35 UCD3138 Controller Board and PFC Board Signal Interface Connector Diagram 34 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Page 35: ...t used Not used J3 17 FAULT 2 Not used J3 18 Not used Not used J3 19 Not used Not used J3 20 Not used Not used J3 21 Not used Not used J3 22 FAULT 3 Not used J3 23 SCI_TX1 SCI_TX1 J3 24 SCI_RX1 SCI_RX1 J3 25 PWM0 LED 2 J3 26 PWM1 LED 3 J3 27 Not used Not used J3 28 Not used Not used J3 29 TCAP Not used J3 30 Not used Not used J3 31 SCI TX0 SCI TX0 J3 32 SCI TX0 SCI RX0 J3 33 INT EXT Not used J3 34...

Page 36: ...AD_08 PFC Vin neutral voltage sense J4 21 AGND Analog ground GND2 J4 22 AD_09 Not used J4 23 AGND Analog ground GND2 J4 24 AD_10 Not used J4 25 AGND Analog ground GND2 J4 26 AD_11 Not used J4 27 AGND Analog ground GND2 J4 28 AD_12 Not used J4 29 AGND Analog ground GND2 J4 30 AD_13 PFC MOSFET Q4 current sense J4 31 AGND Analog ground GND2 J4 32 Not used Not used J4 33 Not used Not used J4 34 Not us...

Page 37: ...ation and primary and secondary communication A brief introduction to the firmware is provided in this section There are three timing levels in the current version of the firmware as shown in Figure 36 1 Fast Interrupt FIQ 2 Standard Interrupt IRQ 3 Background Figure 36 Firmware Structure Overview Almost all firmware tasks occur during the standard interrupt The only exceptions are the serial inte...

Page 38: ...er and its output is used to do current loop reference calculations 12 4 3 Current Loop Configuration Current loop consists of several modules Front End FE Module to configure the AFE block gain For single phase PFC AFE0 is used Filter Module to configure the current loop compensation FILTER1 is used DPWM Module to generate the PWM signal driving PFC For single phase PFC DPWM1B is used NOTE Loop M...

Page 39: ...e 37 is the PFC state machine diagram shown below Figure 37 PFC State Machine 12 6 PFC Control Firmware The PFC Control Firmware is almost all implemented in the IRQ function which includes ADC measurement State machine VRMS calculation Voltage loop calculation Current reference calculation AC drop detection UART receive data Frequency dithering ZVS control 39 SLUU885B March 2012 Revised July 2012...

Page 40: ...sed only for latched over voltage protection It is triggered by the comparator on AD06 Comparator F Comparator F s threshold is set above the limit for the DC bus voltage and the logic on DPWM1 and DPWM2 is set up to turn off DPWM1B and DPWM2B when the threshold is exceeded In the current configuration the only way to restart the PFC after a latched OVP fault is to reset the processor 12 8 PFC Sys...

Page 41: ...gure 27 Ks and Kf are scaling factors For further detail please refer to reference and 12 8 2 ZVS and Valley Control Please refer to the reference and 12 9 Current Feedback Control Compensation Using PID Control A functional block diagram of single phase PFC control loop is shown in Figure 39 PID control is usually used in the feedback loop compensation in digitally controlled power converters Des...

Page 42: ...for current control loop in single phase PFC is formed in the following equation in z domain 3 If Equation 3 is converted to the s domain equivalent using the bilinear transform the result has two forms One is with two real zeros 4 The two zeros can also be presented with complex conjugates and in such case 5 Two complex conjugate zeros are expressed as 6 7 8 The complex conjugate zeros become rea...

Page 43: ...ansfer function of current loop before adding in PID 12 The parameters can be calculated with the assumption of current sensor sampling cycle TS much smaller than the time constant of the PFC choke LB and RB where LB is the choke inductance and RB is the choke DC resistance Choose the sampling frequency to meet 13 When the above assumption is true the delay effect from the sampling can be ignored ...

Page 44: ...ng frequency fs Causes the whole Bode plot to shift to right Figure 40 Tuning PID Parameters 12 9 3 Feedback Loop Compensation with Multiple Set of Parameters The digital control provides more flexibility to establish PID coefficients in multiple sets to adapt various operation conditions For example the single phase PFC EVM has two sets of PID coefficients set A is for low line operation when the...

Page 45: ...f UCD31xx each EVM is related to a particular Designer GUI to allow users to re tune re configure a particular EVM in that regarding with existing hardware and firmware Device GUI is related to a particular device to access its internal registers and memories UCD3138PFCEVM 026 is used with its control card UCD3138CC64EVM 030 where UCD3138 device is placed The firmware for single phase PFC control ...

Page 46: ...ly design evaluation on a bench test Figure 42 Designer GUI Overview 13 3 1 Monitor On the lower left corner of that shown in Figure 42 there are four tabs called Configure Design Monitor and Status Clicking each tab brings a unique page to the front of that page The clicked tab is highlighted in blue Figure 42 shows Monitor tab was clicked The page shows all variables in monitoring with UCD3138 s...

Page 47: ...unication corresponding firmware codes need to be in place As what can be seen is all in gray which means none of the variables is established in communication in this page Figure 43 Page of Status 13 3 3 Design and Configure If click Design or Configure two more different pages will be brought up to the front These pages provide more functions and described in the following section 47 SLUU885B Ma...

Page 48: ...ter all connections are made apply an AC source voltage with a specified value to the board AC input and refer to the other steps in the UCD3138PFCEVM 026 user s guide Open and start the Fusion Digital Power Designer GUI following the steps described in Section 13 2 and Section 13 3 Once PFC pre regulator is up and running and the GUI is opened then it is ready to use the Designer GUI to make eval...

Page 49: ...of all aspects to avoid any possible damage As a warning to help avoid damage if one wants to modify Vout or OV Fault to a different value the recommendation is 375 V to 395 V for VOUT and not exceeding 430 V for OV Fault Also logically VOUT has to be smaller than OV Fault One may modify them to other values but before doing that fully understanding the design is needed to find out any other param...

Page 50: ... fully understanding the design to avoid possible damage VOUT PFC output bulk voltage OV Fault PFC output bulk voltage over voltage fault threshold Freq switching frequency in normal operation As mentioned earlier the firmware version in use is shown in the page of Configuration The firmware version is called DEVICE_ID When place the mouse curser on the version indication is shown UCD3100ISO1 0 0 ...

Page 51: ...8PFCEVM 026 this page is dedicated to the feedback loop design This page including two sub pages One is for the current loop PID coefficients and the other is for the voltage feedback loop which uses PI control Figure 46 Page of Designer 51 SLUU885B March 2012 Revised July 2012 Digitally Controlled Single Phase PFC Pre Regulator Submit Documentation Feedback Copyright 2012 Texas Instruments Incorp...

Page 52: ... up to date in use This can be done by click Schematic View to bring out a new window with the schematics shown in Figure 47 If any values are different from those in the physical circuitry one needs to update them before doing any control loop re tuning Figure 47 Schematics of Single Phase PFC 52 Digitally Controlled Single Phase PFC Pre Regulator SLUU885B March 2012 Revised July 2012 Submit Docu...

Page 53: ... a threshold value used to generate DPWM cycle ending point The DPWM is centered on a period counter which counts up from 0 to PRD and then is reset and starts over again In the single phase PFC design KCOMP is set up equal to PRD In the current control page of the Design PID coefficients can be re tuned The GUI also provides conversion results from PID coefficients to the zeros and the pole by cl...

Page 54: ...rmal operation the control is with Linear Coefficients In transient when the PFC output bulk voltage exceeds the defined Error Threshold for example 16 0 V as shown the PI control coefficients are changed to Non Linear Coefficients to achieve better transient response and to eliminate the output large deviation faster The output error threshold is usually within 5 of the output set point or within...

Page 55: ... PFC THD Reduction and Efficiency Improvement by ZVS or Valley Switching April 2012 6 Zhong Ye and Bosheng Sun PFC Efficiency Improvement and THD Reduction at Light Loads with ZVS and Valley Switching APEC 2012 pp 802 806 7 UCD3138 Digital Power Peripherals Programmer s Manual please contact TI 8 UCD3138 Monitoring and Communications Programmer s Manual please contact TI 9 UCD3138 ARM and Digital ...

Page 56: ...ency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio frequency interference Operation of the equipment may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required t...

Page 57: ... its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this l...

Page 58: ...er you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product Also please do not transfer this product unless you give the same notice above to the transferee Please note that if you could not follow the instructions above you will be subject to penalties of Radio Law of Japan Texas Instruments Japan Limited address 24 1 Nishi Shi...

Page 59: ... property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads Any loads applied outside of the specified output range may result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Plea...

Page 60: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 61: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 62: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 63: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 64: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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