Texas Instruments UCC20520EVM286, User Manual

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Description
5 SLUUBG8B – June 2016 – Revised November 2018
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Copyright © 2016–2018, Texas Instruments Incorporated
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286,
and UCC21530EVM-286
3.1 Features
• Evaluation module for the UCC21520DW, UCC20520DW, and UCC21521CDW in a wide body SOIC-
16 (DW), along with the UCC21530DWK in wide body SOIC-14 (DWK) package
• 3-V to 18-V VCCI power supply range, and up to 25-V VDDA/VDDB power supply range
• 4-A and 6-A source/sink current capability
• 5.7-kV
RMS
Isolation for 1 minute per UL 1577
• TTL/CMOS-compatible inputs
• Onboard trimmer potentiometer for dead-time programming
• 3-position header with for INA, INB, DT and enable/disable
• PCB layout optimized for power supply bypassing cap, gate driver loop
• PCB board cutout that facilitates high voltage isolation test between primary side and secondary side
• Maximized creepage distance between two output channels
• Support for half-bridge test with MOSFETs, IGBTs and SiC MOSFETs with connection to external
power stage
• Testing points allows probing all the key pins of the UCC21520DW, UCC20520DW, UCC21521CDW,
UCC21530DWK, and other wide-body ISO driver family parts.
3.2 I/O Description
Table 1. Jumpers Setting
PINS DESCRIPTION
J1–1 VCCI positive input
J1–2 VCCI negative input
J2–1 VDDA negative input
J2–2 Driver A output
J2–3 VDDA positive input
J3–1 VDDB negative input
J3–2 Driver B output
J3–3 VDDB positive input
J-INA-1 Primary ground
J-INA-2 INA/PWM signal input
J-INA-3 Primary VCC
J-INB-1 Primary ground
J-INB-2 INB signal input
J-INB-3 Primary VCC
J-DIS-1 or J-DIS/EN-1 Primary VCC
J-DIS-2 or J-DIS/EN-2 Enable/Disable signal input
J-DIS-3 or J-DIS/EN-3 Primary ground
J-DT-1 Primary VCC
J-DT-2 Dead-time programming pin
J-DT-3 Connects to trimmer potentiometer