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PCB Layer Diagram

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SLDU028A – January 2018 – Revised March 2020

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Copyright © 2018–2020, Texas Instruments Incorporated

TPS65313-EVM User’s Guide

Figure 40. PCB Inner Layer-4

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Summary of Contents for TPS65313-EVM

Page 1: ...3 EVM Top View With Basic External Connections 3 2 TPS65313 EVM Input Output Voltages and Load Current Requirements 3 3 TPS65313 EVM Jumper Settings 4 4 TPS65313 EVM GUI Installing and Opening the GUI...

Page 2: ...ent With Maximum Load Current for 1 8 V Output Voltage 15 28 BUCK2 Load Transient With Maximum Load Current for 2 3 V Output Voltage 15 29 BOOST Load Transient With Maximum Load Current 15 30 BUCK1 Ga...

Page 3: ...gram With Basic Connections 2 TPS65313 EVM Input Output Voltages and Load Current Requirements Table 1 lists the input and output voltage for each regulator and their maximum load current requirements...

Page 4: ...N PLL input clock The onboard 2 3 MHz clock generated using the LMC555 timer can be used to sync the device this external clock Jumper between J10_2_3 J11 MCUERR MCU error pin monitor Jumper between J...

Page 5: ...ens click the Next button Select the I accept the agreement radio button and then click the Next button Figure 2 TPS65313 EVM GUI Installation Sequence Step 3 In the next window select the LabVIEW RTE...

Page 6: ...equire any special power down sequence The EVM can be powered down by turning off the VBAT supply or clicking the CLR_WAKE_LATCH button on the GUI 6 TPS65313 GUI The TPS65313 GUI provides many feature...

Page 7: ...h side transistor on the VBAT input supply line and this supply voltage is applied on the WAKE pin which starts device start up When the device is successfully powered on disabling the WAKE button has...

Page 8: ...tchdog is synced when the device is in the SAFE state the SAFE to DIAGNOSTIC button can be clicked to make the device to go to the DIAGNOSTIC state When the device is in the DIAGNOSTIC state the DIAGN...

Page 9: ...ck Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 5 Watchdog Window Timing Diagram Section 11 describes the watchdog implementation on the MSP430 MCU on the EVM 6...

Page 10: ...or written on the Register Map page Figure 6 shows a snapshot of GUI Register Map page 1 Update Mode drop down menu With the Immediate option changes are immediately written to the device With the Def...

Page 11: ...For a list of orderable part numbers refer to the TPS65313 Q1 Wide VIN Power Management IC for Automotive Applications datasheet To select an orderable part number in the GUI click the Device Selecti...

Page 12: ...20 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 8 Jumper Settings for EEPROM Update 7 TPS65313 EVM Typical Plots This section provides plots for efficiency start up power down rippl...

Page 13: ...mentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 11 BOOST Efficiency Plot 7 2 Power Up Plots Figure 12 Power Up Showing Regulator Outputs and VREG...

Page 14: ...Down Showing Regulator Outputs and VREG Figure 17 Power Down Showing Regulator Outputs and VIN 7 4 Ripple Voltage Plots All the ripple measurements were done with a 20 MHz bandwidth differential acti...

Page 15: ...Current for 1 2 V Output Voltage Figure 21 BUCK2 Ripple Voltage With 2 A Load Current for 1 8 V Output Voltage Figure 22 BUCK2 Ripple Voltage With 2 A Load Current for 2 3 V Output Voltage Figure 23...

Page 16: ...ient With Maximum Load Current for 1 2 V Output Voltage Figure 27 BUCK2 Load Transient With Maximum Load Current for 1 8 V Output Voltage Figure 28 BUCK2 Load Transient With Maximum Load Current for 2...

Page 17: ...back Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 31 BUCK2 Gain and Phase Plot With 1 A Load Current for VIN 3 3 V Phase Margin 50 Degree Bandwidth 75 kHz Figure...

Page 18: ...GND AGND1 PGND PGND VBAT_INT 0 1uF C72 AGND1 0 R59 VIN_SAFE VIN_SAFE 0 R3 2 2uF C35 AGND1 AVIN VBAT_INT AVIN 1 2 3 J13 1 2 3 J14 VIO EXT_SENSE1 EXT_SENSE2 PGND PGND 40V D7 DNP CLK_555 CLK_555 1uH L4 4...

Page 19: ...1 29 P2 1 TA1 2 30 P2 2 TA2CLK SMCLK 31 P2 3 TA2 0 32 P2 4 TA2 1 33 P2 5 TA2 2 34 P2 6 RTCCLK DMAE0 35 P2 7 UCB0S TE UCA0CLK 36 P3 0 UCB0SIMO UCB0SDA 37 P3 1 UCB0SOMI UCB0SCL 38 P3 2 UCB0CLK UCA0S TE...

Page 20: ...KE GPIO8 WAKE_USB VBUS_IN GND GND VBUS_IN 3 3V 1 2 J27 VBAT_INT 100k R43 100k R47 10k R44 3 5 4 Q3A BC 846PN H6327 6 2 1 Q3B BC 846PN H6327 GND EXT_SENSE1 GPIO13 EXT_SENSE1 1 2 J28 VBAT_INT 100k R45 1...

Page 21: ...C5 C11 C16 C36 6 10 F CAP CERM 10 F 10 V 20 X7R 0805 0805 C2012X7R1A106M125AC TDK C8 C9 C14 C15 C28 C29 C30 7 4700 pF CAP CERM 4700 pF 50 V 10 X7R 0805 0805 08055C472KAT2A AVX C13 C17 C37 C38 C40 C41...

Page 22: ...pF CAP CERM 30 pF 100 V 5 C0G NP0 0603 0603 GRM1885C2A300JA01D MuRata C54 1 0 01 F CAP CERM 0 01 F 50 V 5 C0G NP0 AEC Q200 Grade 1 0603 0603 CGA3E2C0G1H103J080AA TDK C55 1 2 2 F CAP CERM 2 2 F 16 V 1...

Page 23: ...7 F Diodes Inc D6 1 Green LED Green SMD 1 6x0 8x0 8 mm LTST C190KGKT Lite On FB1 1 90 Ferrite Bead 90 100 MHz 1 5 A 1206 1206 MI1206K900R 10 Laird Signal Integrity Products H1 H2 H3 H4 4 Bumpon Hemisp...

Page 24: ...e L8 1 1 5 H Inductor Film 1 5 H 3 1 A 0 06 AEC Q200 Grade 0 SMD 2 5x2 mm TFM252012ALMA1R5MTAA TDK Q1 Q3 Q4 3 65 V Transistor NPN PNP Pair 65 V 0 1 A SOT 363 SOT 363 BC 846PN H6327 Infineon Technologi...

Page 25: ...Dale R31 R35 2 100 k RES 100 k 5 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402100KJNED Vishay Dale R33 1 130 k RES 130 k 5 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402130KJNED Vishay Dale R34 R42 2 33 k...

Page 26: ...TP6 TP7 TP8 TP9 TP10 TP15 TP16 8 PCB Pin Swage Mount TH PCB Pin 2505 2 2505 2 00 44 00 00 07 0 Mill Max TP11 TP12 2 Test Point Miniature White TH White Miniature Testpoint 5002 Keystone TP17 TP19 2 Te...

Page 27: ...3 MHz D0008A SOIC 8 D0008A LMC555IM NOPB Texas Instruments LMC555IMX NOPB Texas Instruments Y1 1 Crystal 24 000 MHz 20 pF SMD Crystal 11 4x4 3x3 8 mm ECS 240 20 5PX TR ECS Inc C68 C69 C75 0 0 01 F CAP...

Page 28: ...agram www ti com 28 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide 10 PCB Layer Diagram Figure 36 P...

Page 29: ...ti com PCB Layer Diagram 29 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 37 PCB Inner Laye...

Page 30: ...Layer Diagram www ti com 30 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 38 PCB Inner Laye...

Page 31: ...ti com PCB Layer Diagram 31 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 39 PCB Inner Laye...

Page 32: ...Layer Diagram www ti com 32 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 40 PCB Inner Laye...

Page 33: ...ti com PCB Layer Diagram 33 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide Figure 41 PCB Bottom La...

Page 34: ...0 algorithm implemented on EVM is as follows Initialize wait times for each answer These values work for default WDT window settings wait_time 30 30 30 30 25 mcu_answer_cnt 3 wdt_step is the current s...

Page 35: ...ented on EVM 35 SLDU028A January 2018 Revised March 2020 Submit Documentation Feedback Copyright 2018 2020 Texas Instruments Incorporated TPS65313 EVM User s Guide WR_WDT_ANSWER calculate_answer0 ques...

Page 36: ...vision Page Updated the PCB figures to reflect the final released PCB 3 Changed Input Voltage From 5 8 V to 36 V To 6 V to 18 V and updated the table note 3 Updated J9 J27 and J28 default jumper setti...

Page 37: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 38: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 39: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 40: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 41: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 42: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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