Texas Instruments TPS65276V PMIC, User Manual

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A
B
J31:
VOUT2
J18:
VOUT1
JP1/EN1
JP2/EN2
JP7/ADDR
JP8/MODE
GND
J1:5/12V
JP9:I C IO
POWER
2
JP15/I C
2
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Bench Test Setup Conditions
5 Bench Test Setup Conditions
5.1 Header Description and Jumper Placement
Figure 7 illustrates the header description and jumper placement for the EVM.
Test points:
A: LX of Vout1
B: LX of Vout2
Vout1, Vout2
Figure 7. Header Description and Jumper Placement
Table 2 shows the I/O connections for the EVM.
Table 2. Input/Output Connection
Jumper Number Function Description
J1 Vin Connector Apply power supply to this connector
J18 Buck1 Connector Output of Buck1
J31 Buck2 Connector Output of Buck2
7 SLVU878 – February 2013 4.5-V to 18-V Input, Dual (6.5-A and 3.5-A) Synchronous Step-Down
Converter With I
2
C Controlled VID and Current Sharing Evaluation Module Submit Documentation Feedback
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