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Requirements
3
SLVUAH0A – November 2015 – Revised July 2017
Copyright © 2015–2017, Texas Instruments Incorporated
TPS65084x Evaluation Module
2.3
Power Supply
A DC power supply capable of delivering at least 5.6 V and 1 A is required to power on the EVM. If
loading the EVM, a power supply with a 10 A limit or higher is recommended.
2.4
EVM Kit
The EVM kit contains the following items:
•
TPS65084x HVL116A evaluation board
3
Terminal Block Descriptions
The EVM features 14 terminal blocks around the perimeter of the EVM. These are used for providing
VSYS (J1) and loading the outputs. Each terminal block is labeled with the input or output on one side and
GND on the other. Each terminal block also has a pair of test points for sense line probing.
4
Test Point Descriptions
Numerous test points are provided for sensing voltages on the EVM. The CTL1–6 test points also provide
a way to override the on-board switches, when desired. Note that to override the switches, they must be in
the ‘OFF’ position (not shorted to GND).
(1)
Test points are not designed to carry current. They are intended for measuring voltage.
Table 1. Test Points
(1)
Test Point
Description
CTL1
PMICEN
CTL2
DDR_SEL
CTL3
SLP_S0IXB
CTL4
SLP_S3B
CTL5
SLP_S4B
CTL6
DDRVTTCTRL
GPO1
RSMRSTB
GPO2
DRAMPWROK
GPO3
COREPWROK
GPO4
VCCAPWROK
V5ANA
External 5-V supply input to internal load switch that connects this pin to LDO5P0 pin.
LDO5V
5-V internal LDO (LDO5P0) sense
LDO3P3
3.3-V internal LDO sense
VREF
Bandgap reference output
GND
Connected to GND planes
DIG_1P8V
1.8-V external LDO sense
USB_3P3V
3.3-V external LDO sense for USB2ANY onboard MSP430
BUCK3P3V
3.3-V external BUCK sense
BUCK5V
5-V external BUCK sense
EPGOOD
Power good indicator of external dual controller (requires pull-up to indicate properly)
Output Sense+ (Unlabeled)
Each rail has a sense+ line connected to the central output cap
Output Sense– (Unlabeled)
Each rail has a sense– line connected to the central output cap
Input Sense+ (TP1)
VSYS sense+ line connected to input cap of PMIC
Input Sense– (TP2)
VSYS sense– line connected to input cap of PMIC