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Test Summary

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4.3

Test Procedure Using a Single Cell Li-Ion Battery

1. Make sure that the EVM is set up according to

Table 1

and

Figure 1

, and that the power supply is

preset to 3.3 VDC at ~150 mA current limit.

2. Turn on the input supply and verify the input voltage is ~3.3 VDC (DMM#1) and the output voltage is at

~2.1 VDC (DMM#2).

3. Look at CH1 and CH2 and verify that the duty cycle is near 70% and the ripple is less than 10-mV

ripple; see

Figure 6

for typical waveforms.

4. Vary the load between 0 and 100 mA (1 k

Ω

to 21

Ω

). Observe the change in the switching waveform

from PFM with discontinuous ringing to PWM mode. It may be necessary to change the time scale on
the scope to 1

µ

s/div for light loads. See

Figure 7

and

Figure 8

for various loads. Set the load back to

approximately 21

Ω

.

5. Vary the input voltage from 3.3 VDC to 3.9 VDC and back to 2.4 VDC to see the change in duty cycle.
6. Reduce the input voltage from 2.4 VDC to 1.9 VDC and verify that the switcher automatically goes into

bypass mode, disabling the switcher and turning on the internal bypass FET. The output should be the
input voltage minus the IR drop across the pass FET (~2

Ω

). The STAT pin should go to the

high-impedance state and be pulled to the output voltage.

Figure 9

was captured by moving CH2 to the

J7-STAT relative to ground, 1 V/div, dc-coupled, setting the time scale to 50

µ

s/div (a slower time scale

may be required, depending on power-supply decay), single-sequence trigger on CH2, and removing
input power. The phase node is shown going into PFM, then disabling switching, and then indicating
bypass mode by the STAT pin being pulled up to the output voltage (~2.2 VDC).

CAUTION

The following step disables the buck converter and switches the input voltage
to the output. Make sure the maximum system input voltage is not exceeded by
this step or the later steps that place the JP1 shunt in the bypass position.

7. Move the shunt on jumper JP1 from the ON position to the Bypass position. Notice that the switcher is

disabled and the input voltage is switched to the output via the bypass switch. The output should be
the input voltage minus the IR drop across the pass FET (~2 ohms). The STAT pin should go to the
high-impedance state and be pulled to the output voltage. Move the shunt on jumper JP1 to the ON
position.

8. For steps 9 through 13, one can view the figure and determine how scope was set up.
9. See

Figure 10

for the transition from converter switch mode to bypass mode by pulling the ON/BYP pin

low.

10. Remove the bypass jumper to see transition from bypass mode to converter switch mode; see

Figure 11

.

11. See

Figure 12

for typical hot-plug power up.

12. See

Figure 13

for the transient output load step from 50 mA to 100 mA.

13. See

Figure 14

for the transient output load step from 100 mA to 50 mA.

4

TPS62730 Stepdown Converter With Bypass Mode for Ultralow-Power Wireless

SLVU455

April 2011

Applications

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Copyright

©

2011, Texas Instruments Incorporated

Summary of Contents for TPS62730

Page 1: ...l Layouts 5 5 3 Bill of Materials 7 6 Oscilloscope Traces 7 List of Figures 1 EVM Schematic and Evaluation Setup 3 2 TPS62730 EVM Board Schematic 5 3 Assembly Layer 5 4 Top Layer 6 5 Bottom Layer 6 6...

Page 2: ...IC will be in an unknown state mode and the output voltage could be anywhere between the input voltage and the regulation voltage The EVM has a pullup resistor on the ON BYP pin to Vin so that it stay...

Page 3: ...d of DMM 2 J5 2 SNS output Negative lead of DMM 2 J6 1 2 GND Negative lead to system load or load resistance J7 1 STAT Positive lead of DMM meter 3 J7 2 GND Negative lead of DMM meter 3 JP1 1 2 ON App...

Page 4: ...may be required depending on power supply decay single sequence trigger on CH2 and removing input power The phase node is shown going into PFM then disabling switching and then indicating bypass mode...

Page 5: ...nd Bill of Materials 5 1 Schematic Figure 2 TPS62730 EVM Board Schematic 5 2 Physical Layouts Figure 3 Assembly Layer 5 SLVU455 April 2011 TPS62730 Stepdown Converter With Bypass Mode for Ultralow Pow...

Page 6: ...f Materials www ti com Figure 4 Top Layer Figure 5 Bottom Layer 6 TPS62730 Stepdown Converter With Bypass Mode for Ultralow Power Wireless SLVU455 April 2011 Applications Submit Documentation Feedback...

Page 7: ...g 0 100 inch 2 54 mm 3 PEC02SAAN Sullins 1 L1 2 2 H Inductor SMT 0 8 A 0 23 0805 LQM21PN2R2NGC muRata 1 R1 10 0 k Resistor chip 1 16W 1 0603 Std Std 1 R2 1 00 M Resistor chip 1 16W 1 0603 Std Std 1 U1...

Page 8: ...e CH2 Output Ripple 0 2 s div Figure 8 PFM Mode at Low Load 11 mA CH1 Phase CH2 Output Ripple 1 s div 8 TPS62730 Stepdown Converter With Bypass Mode for Ultralow Power Wireless SLVU455 April 2011 Appl...

Page 9: ...Input Power CH1 Phase Node CH2 STAT Pin Figure 10 Transition From Converter Switch Mode to Bypass Mode by Pulling ON BYP Pin Low 9 SLVU455 April 2011 TPS62730 Stepdown Converter With Bypass Mode for...

Page 10: ...erter Switch Mode by Pulling ON BYP Pin High Figure 12 Startup by Hot Plugging the Input Power Source 10 TPS62730 Stepdown Converter With Bypass Mode for Ultralow Power Wireless SLVU455 April 2011 App...

Page 11: ...ad Step From 50 mA to 100 mA Figure 14 Transient Output Load Step From 100 mA to 50 mA 11 SLVU455 April 2011 TPS62730 Stepdown Converter With Bypass Mode for Ultralow Power Wireless Applications Submi...

Page 12: ...ct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer...

Page 13: ...orized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parti...

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