22uF
C2
VIN = 4.5V - 18V/5A
VOUT = 1.05V/6A
GND
22uF
C3
0
R1
0.1uF
C14
100k
R7
PG
VIN
TP5
TP7
TP14
VOUT
SW
VBST
0.1uF
C5
GND
TP4
TP13
TP1
TP3
100k
R4
EN
VCC
VIN
TP2
1
2
J1
1
2
J2
TP6
TP16
TP9
100k
R5
GND
TP15
FB
TP8
0.1uF
C4
5.1V
D1
1uF
C12
22uF
C6
22uF
C7
22uF
C8
0.1uF
C11
0
R6
DNP
49.9
R2
GND
1
2
3
JP1
100k -- OOA
1
2
3
4
5
6
J3
100k
R10
MODE
0
R9
GND -- PSM
VCC -- FCCM
VCC
1uH
L1
PGND
2
VIN
1
PGND
4
PGND
3
EN
5
PGND
6
MODE
7
SW
8
VBST
9
VCC
10
AGND
11
VFB
12
PG
13
U1
TPS566235RJNR
GND
GND
TP11
MODE
22uF
C1
DNP
22uF
C9
DNP
22uF
C10
DNP
100pF
C13
DNP
MODE selection:
TP10
TP12
GND
GND
15.0k
R3
20.0k
R8
Modifications
3
SLUUC03 – February 2019
Copyright © 2019, Texas Instruments Incorporated
TPS566235EVM-036 evaluation module
3.2
Mode Selection
TPS566235 has a MODE pin to select 3 different operation mode at light load. The device reads the
voltage on MODE pin during start-up and latches onto one of the MODE options listed below in
Table 2. MODE Pin Resistor Setting
V
MODE
RECOMMENDED MODE RESISTOR R
M
OPERATION MODE
0 - 0.3 V
0
Ω
Eco-Mode
0.3 V - 1.2 V
100 k
Ω
- 150 k
Ω
Out-of-Audio (OOA)
> 1.2 V
Connected to VCC pin (recommend) or >
400 k
Ω
Forced CCM (FCCM)
Changing the position of jumper on J3 can modify MODE pin configuration before power on.
4
Schematic and Board layout
4.1
Schematic
illustrates TPS566235EVM-036 Evaluation Module schematic.
Figure 1. TPS566235EVM-036 Evaluation Module Schematic
4.2
Board Layout
through
illustrates the TPS566235EVM-036 board layout. The top layer contains the
main power traces for V
IN
, V
OUT
, and SW, there is a large area filled with ground. The internal layer-1 and
layer-2 are ground plane. The bottom layer is another ground plane. The ground traces of each layer are
connected together with multiple VIAs. The top and bottom layers are 2-oz copper and internal layers are
1-oz copper.