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STANDARD TERMS FOR EVALUATION MODULES

1.

Delivery:

TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1

EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2

EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2

Limited Warranty and Related Remedies/Disclaimers

:

2.1

These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2

TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques

are

used

to

the

extent

TI

deems

necessary.

TI

does

not

test

all

parameters

of

each

EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3

TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

Summary of Contents for TPS5430

Page 1: ...S5431 Line Regulation 7 Figure 2 7 PS5430 Transient Response 7 Figure 2 8 TPS5431 Transient Response 8 Figure 2 9 TPS5430 Loop Response 8 Figure 2 10 PS5431 Loop Response 9 Figure 2 11 TPS5430 Output...

Page 2: ...5430 31 provides an enable input The absolute maximum input voltage is 38 V for the TPS5430EVM 173 and 25 V for the TPS5431EVM 173 Table 1 1 Input Voltage and Output Current Summary EVM INPUT VOLTAGE...

Page 3: ...on time is greater than 200 ns and the maximum duty cycle is less than 87 The values given in Table 1 3 are standard values not the exact value calculated using Equation 1 Table 1 3 Output Voltages A...

Page 4: ...VMs peak at a load current of about 0 75 A and then decrease as the load current increases towards full load Figure 2 1 shows the efficiency for the TPS5430EVM 173 at an ambient temperature of 25 C 75...

Page 5: ...ut Voltage Load Regulation The load regulation for the TPS5430EVM 173 and TPS5431EVM 173 are shown in Figure 2 3 and Figure 2 4 0 1 0 08 0 06 0 04 0 02 0 0 02 0 04 0 06 0 08 0 1 0 0 5 1 1 5 2 2 5 3 I...

Page 6: ...the TPS5430EVM 173 and TPS54310EVM 173 are shown in Figure 2 5 and Figure 2 6 0 1 0 08 0 06 0 04 0 02 0 0 02 0 04 0 06 0 08 0 1 10 15 20 25 30 35 I 0 A O I 1 5 A O I 3 A O V Input Voltage V I Output R...

Page 7: ...wn in Figure 2 7 and Figure 2 8 The current step is from 25 to 75 of maximum rated load Total peak to peak voltage variation is as shown including ripple and noise on the output V 50 mV Div AC Coupled...

Page 8: ...are shown for VIN voltage of 25 V for the TPS5430EVM 173 and 15 V for the TPS5431EVM 173 Load current for both measurements is 1 A 60 60 100 1 M 180 180 Gain dB f Frequency Hz Phase deg Gain Phase Fig...

Page 9: ...re 2 12 The output current is the rated full load of 3 A Voltage is measured directly across output capacitors Time 1 s Div V 20 mV Div AC Coupled OUT V 20 V Div P Figure 2 11 TPS5430 Output Ripple ww...

Page 10: ...13 and Figure 2 14 The output current for each device is at full rated load of 3 A Time 1 s Div V 20 V Div PH V 100 mV Div AC Coupled IN Figure 2 13 TPS5430 Input Ripple Test Setup and Results www ti...

Page 11: ...1 06 V the start up sequence begins and the internal reference voltage begins to ramp up at the internally set rate towards 1 221 V and the output voltage ramps up to the externally set value of 5 V T...

Page 12: ...ENA feature The top and bottom and internal ground traces are connected with multiple vias placed around the board including four vias directly under the TPS5430 device to provide a thermal path from...

Page 13: ...p Side Figure 3 3 Top Side Assembly www ti com Board Layout SLVU157A MARCH 2006 REVISED OCTOBER 2021 Submit Document Feedback TPS5430 and TPS5431 Step Down Converter Evaluation Module User s Guide 13...

Page 14: ...ection 4 1 Schematic The schematic for the TPS5430EVM 173 and TPS5431EVM 173is shown in Figure 4 1 Schematic and Bill of Materials www ti com 14 TPS5430 and TPS5431 Step Down Converter Evaluation Modu...

Page 15: ...tic www ti com Schematic and Bill of Materials SLVU157A MARCH 2006 REVISED OCTOBER 2021 Submit Document Feedback TPS5430 and TPS5431 Step Down Converter Evaluation Module User s Guide 15 Copyright 202...

Page 16: ...1 1 R1 10 0k Resistor Chip 1 16W 1 0603 Std Std 1 1 R2 3 24k Resistor Chip 1 16W 1 0603 Std Std 1 1 R3 0 Resistor Chip 1 16W 1 0603 Std Std 4 4 TP1 TP3 TP5 TP6 Test Point Red Thru Hole Color Keyed 0 1...

Page 17: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 18: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 19: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 20: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 21: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 22: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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