Texas Instruments TPS274C65, User Manual, Page: 6 / 18

5 Connection Descriptions
Table 5-1 shows the test points populated on the board as well as the signal connectors.
Table 5-1. Connections and Test Points
Connector and Test Point Description
J2, TP1 Supply Voltage VS
J3, TP2 VDD voltage. Connect a supply if internal regulator is disabled
J4, TP3 Output voltage 1 (VOUT1)
TP4 RCB1 signal
J7, TP9 Output voltage 2 (VOUT2)
TP10 RCB2 signal
J8, TP13 Output voltage 3 (VOUT3)
TP15 RCB3 signal
J9, TP17 Output voltage 4 (VOUT4)
TP19 RCB4 signal
J5, J10
BoosterPack headers. Can be used to connect to TI microcontroller directly, or use jumpers to pair with
other microcontrollers.
J6, J11, TP5, TP7, TP8, TP11,
TP14, TP20, TP24, TP27
Ground
TP18 FAULT Signal
TP22 ADDCFG pin
TP23 SCLK pin on IC
TP25 SDI pin on IC
TP26 SDO pin on IC
TP28 CS pin on IC
TP29 ISNS pin on IC
Table 5-2 shows the relevant configuration jumpers of the TPS274C65EVM as well as the associated values.
Please refer to the TPS274C65 data sheet for detailed information on each pin's functionality.
Please note that a white mark on the jumper silkscreen is reflecting the position 1 of the jumper.
Table 5-2. Jumper Configurations
Jumper Function/Settings
J1 Connect 1 and 2 to disable on-board buck converter; connect 2 and 3 to enable on-board buck converter.
J12 Connect 1 and 2 to use fixed 1-kΩ resistor; connect 2 and 3 to use on-board potentiometer.
J13
Disconnect to use the internal regulator; do not use external VDD. Connect to disable the internal regulator;
use external VDD in this case.
J14 Connect to enable SPI communications.
J15 Connect 1 and 2 to enable daisy chain mode SPI communication; connect 2 and 3 to use addressable SPI.
J16
Connect 2 and 3 to power VDD using internal buck converter; connect 1 and 2 to power VDD with
microcontroller voltage output; leave open when using internal regulator.
J17
Connect 2 and 3 if using addressable SPI; connect 1 and 2 for every other EVM if using multiple EVMs in
daisy chain mode.
J18
Connect 2 and 3 if using addressable SPI; connect 1 and 2 for every other EVM if using multiple EVMs in
daisy chain mode.
J19, J20, J21, J22 Connect to bypass the RCB FETs; leave open for reverse current blocking.
Connection Descriptions www.ti.com
6 TPS274C65 Evaluation Module SLVUCI0 – MAY 2022
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