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STANDARD TERMS FOR EVALUATION MODULES

1.

Delivery:

TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1

EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2

EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2

Limited Warranty and Related Remedies/Disclaimers

:

2.1

These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2

TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques

are

used

to

the

extent

TI

deems

necessary.

TI

does

not

test

all

parameters

of

each

EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3

TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

Summary of Contents for TPIC74101EVM

Page 1: ...r Bypass Jumper Settings 4 Figure 3 1 Top Assembly Layer 6 Figure 3 2 Bottom Assembly Layer viewed from bottom 6 Figure 3 3 Top Layer Routing 7 Figure 3 4 Bottom Layer Routing viewed from bottom 7 Fig...

Page 2: ...tch Mode Power Supply Buck Regulator The EVM contains one DC DC converter See Table 1 1 Table 1 1 Device and Package Configurations CONVERTER IC PACKAGE U1 TPIC74101QPWPRQ1 PWP 20 Introduction www ti...

Page 3: ...output J4 VOUT is the regulated output voltage for the converter J5 GND is a ground terminal for the EVM JP1 JP2 SCR1 SCR0 are jumpers used to set the slew rate of the switching transistor for the L1...

Page 4: ...or disabled 5Vg disabled 5Vg enabled 1 0 1 0 Figure 2 4 5Vg Regulated Output Jumper Settings JP6 Bypass is the jumper used to bypass the low pass filter inductor on the power supply input to the devi...

Page 5: ...um fast or fast JP3 LPM selects how Low Power Mode is set Enabled or Disabled JP4 EN turns the device on or off JP5 5Vg turns the regulated 5 V output on or off JP6 Bypass disables the low pass filter...

Page 6: ...s high efficiency but does dissipate power The PowerPAD package offers an exposed thermal pad to enhance thermal performance This must be soldered to the copper landing on the PCB for optimal performa...

Page 7: ...uting Figure 3 4 Bottom Layer Routing viewed from bottom www ti com Board Layout SLIU006A DECEMBER 2011 REVISED OCTOBER 2022 Submit Document Feedback TPIC74101EVM User s Guide 7 Copyright 2022 Texas I...

Page 8: ...ematic Figure 4 1 TPIC74101EVM Schematic Schematic www ti com 8 TPIC74101EVM User s Guide SLIU006A DECEMBER 2011 REVISED OCTOBER 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorpor...

Page 9: ...spacing 36 pin strip 0 100 x 3 Sullins PTC36CAAN 1 JP6 Header 2 pin 100 mil spacing 36 pin strip 0 100 x 2 Sullins PTC36CAAN 2 L1 L2 Inductor SMT 33 uH 4 3 A 54 9 m 12 3mm x 12 3mm Coilcraft MSS1260T...

Page 10: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 11: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 12: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 13: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 14: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 15: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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