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5.1
GPIO Registers
GPIO Registers
The GPIO register set includes required registers such as peripheral identification and emulation control.
The GPIO registers are listed in
. See the device-specific datasheet for the memory address of
these registers.
Table 5-1. Video Port Registers
Offset Address
(1)
Acronym
Register Name
Section
00h
VPPID
Video Port Peripheral Identification Register
04h
PCR
Video Port Peripheral Control Register
20h
PFUNC
Video Port Pin Function Register
24h
PDIR
Video Port Pin Direction Register
28h
PDIN
Video Port Pin Data Input Register
2Ch
PDOUT
Video Port Pin Data Output Register
30h
PDSET
Video Port Pin Data Set Register
34h
PDCLR
Video Port Pin Data Clear Register
38h
PIEN
Video Port Pin Interrupt Enable Register
3Ch
PIPOL
Video Port Pin Interrupt Polarity Register
40h
PISTAT
Video Port Pin Interrupt Status Register
44h
PICLR
Video Port Pin Interrupt Clear Register
(1)
The absolute address of the registers is device/port specific and is equal to the base a offset address. See the
device-specific datasheet to verify the register addresses.
SPRUEM1 – May 2007
General-Purpose I/O Operation
151