2.5
Completion of a DMA Transfer
Completion of a DMA Transfer
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A parameter set for a given channel is complete when the required number of transfer requests is
submitted (based on receiving the number of synchronization events). The expected number of TRs for a
non-null/non-dummy transfer is shown in
for both synchronization types along with state of the
PaRAM set prior to the final TR being submitted. When the counts (BCNT and/or CCNT) are this value,
the next TR results in a:
•
Final chaining or interrupt codes to be sent by the transfer controllers (instead of intermediate).
•
Link updates (linking to either null or another valid link set).
Table 2-6. Expected Number of Transfers for Non-Null Transfer
Sync Mode
Counts at time 0
Total # Transfers
Counts prior to final TR
A-synchronized
ACNT
(BCNT
×
CCNT ) TRs of ACNT bytes each
BCNT == 1 && CCNT == 1
BCNT
CCNT
AB-synchronized
ACNT
CCNT TRs for ACNT
×
BCNT bytes each
CCNT == 1
BCNT
CCNT
You must program the PaRAM OPT field with a specific transfer completion code (TCC) along with the
other OPT fields (TCCHEN, TCINTEN, ITCCHEN, and ITCINTEN bits) to indicate whether the completion
code is to be used for generating a chained event or/and for generating an interrupt upon completion of a
transfer.
The specific TCC value (6-bit binary value) programmed dictates which of the 64-bits in the chain event
register (CER[TCC]) and/or interrupt pending register (IPR[TCC]) is set.
See
for details on interrupts and
for details on chaining.
You can also selectively program whether the transfer controller sends back completion codes on
completion of the final transfer request (TR) of a parameter set (TCCHEN or TCINTEN), for all but the
final transfer request (TR) of a parameter set (ITCCHEN or ITCINTEN), or for all TRs of a parameter set
(both). See
for details on chaining (intermediate/final chaining) and
for details on
intermediate/final interrupt completion.
A completion detection interface exists between the EDMA3 channel controller and transfer controller(s).
This interface sends back information from the transfer controller to the channel controller to indicate that
a specific transfer is completed.
All DMA/QDMA PaRAM sets must also specify a link address value. For repetitive transfers such as
ping-pong buffers, the link address value should point to another predefined PaRAM set. Alternatively, a
nonrepetitive transfer should set the link address value to the null link value. The null link value is defined
as FFFFh. See
for more details.
Note:
Any incoming events that are mapped to a null PaRAM set results in an error condition. The
error condition should be cleared before the corresponding channel is used again. See
There are three ways the EDMA3CC gets updated/informed about a transfer completion: normal
completion, early completion, and dummy/null completion. This applies to both chained events and
completion interrupt generation.
EDMA3 Architecture
42
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