background image

3.2 EVM Jumpers

Table 3-2

 lists the jumpers on the TLV841EVM. As ordered, the EVM will have eight (8) jumpers and five (5) 

shunts installed.

Table 3-2. List of Onboard Jumpers

JUMPER

JUMPER CONFIGUATION

DESCRIPTION

J1

Shunted

Connect a shunt to jumper J1 to use R1 as the pull-up resistor on the output RESET 
pin.

J2

N/A

Both pins on J2 are connected together. Connect either pin on jumper J2 to the input 
power supply.

J3

N/A

Both pins on J3 are connected together. Use either pin on jumper J3 to monitor the 
output RESET pin.

J4

Shunted

Connect a shunt to jumper J4 to short V

mon

 to VDD

J5

N/A

Both pins on J5 are connected together. Connect either pin on jumper J5 to connect to 
ground.

J6

Open (Default)

For TLV841C: If no shunt is placed on J6, the reset time delay t

D

 defaults to the 

minimum RESET time delay set internally by the TLV841C.

Pin 1 [C2] to Pin 2 [CT]

For TLV841C: Connect a shunt to jumper J6 for different RESET time delay 
configurations.

OPTIONAL:

 For TLV841S: Jumper J6 allows the user the option to connect C2 to the 

SENSE input, as a bypass capacitor, to reduce the sensitivity of transient voltages on 
the monitored signal. Connecting C2 to the SENSE input will affect the timing specs 
such as reset time delay t

D

.

Pin 2 [CT] to Pin 3 [C3]

For TLV841C: Connect a shunt to jumper J6 for different RESET time delay 
configurations.

OPTIONAL:

 For TLV841S: Jumper J6 allows the user the option to connect C3 to the 

SENSE input, as a bypass capacitor, to reduce the sensitivity of transient voltages on 
the monitored signal. Connecting C3 to the SENSE input will affect the timing specs 
such as reset time delay t

D

.

J7

Shunted

Pin 1 to Pin 2

For TLV841S and TLV841M: Connect a shunt to jumper J7 to connect different 
configurations (Rdiv or MR) from J8.

For TLV841C: Remove shunt to jumper J7 for this option.

J8

Open

Pin 1 [MR] to Pin 2 [GND]

Connect the shunt to jumper J8 for different configurations. Connect the shunt from MR 
(Manually Reset) and to GND.

Shunted (Default)

Pin 2 [GND] to Pin 3 [Rdiv]

Connect the shunt to jumper J8 for different configurations. Connect the shunt to Rdiv 
and GND for the voltage divider configuration.

EVM Connectors

www.ti.com

10

TLV841EVM Voltage Supervisor User Guide

SNVU755A – JANUARY 2021 – REVISED JUNE 2021

Submit Document Feedback

Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for TLV841EVM

Page 1: ...Program tD via CT TLV841C 13 5 Revision History 14 List of Figures Figure 1 1 TLV841EVM Board Top 2 Figure 1 2 TLV841EVM Board Bottom 3 Figure 2 1 TLV841EVM Schematic with TLV841S 5 Figure 2 2 Compone...

Page 2: ...t use a pull up resistor Therefore R1 on the TLV841EVM must be disconnected Please also note if using TLV841EVM with the active high variant TLV841xxPHxx the active low RESET label on the EVM board an...

Page 3: ...LV841 1 2 TLV841 Applications Personal electronics Home theater and entertainment Electronic point of sale Grid infrastructure Data center and enterprise computing www ti com Introduction SNVU755A JAN...

Page 4: ...description of the TLV841EVM schematic bill of materials BOM and layout Schematic Bill of Materials and Layout www ti com 4 TLV841EVM Voltage Supervisor User Guide SNVU755A JANUARY 2021 REVISED JUNE 2...

Page 5: ...TLV841EVM Schematic with TLV841S www ti com Schematic Bill of Materials and Layout SNVU755A JANUARY 2021 REVISED JUNE 2021 Submit Document Feedback TLV841EVM Voltage Supervisor User Guide 5 Copyright...

Page 6: ...0 1 W 0603 0603 RC0603FR 0730K1L Yageo America R2 1 47 5k RES 47 5 k 1 0 1 W 0603 0603 RC0603FR 0747K5L Yageo America R3 1 10k RES 10 0 k 1 0 1 W 0603 0603 RC0603FR 0710KL Yageo America SH J1 SH J2 S...

Page 7: ...Figure 2 7 show the top and bottom layers and Figure 2 8 shows the top solder mask of the EVM 2 4 Layout Figure 2 2 Component Placement Top Assembly Figure 2 3 Component Placement Bottom Assembly Figu...

Page 8: ...m Layer Figure 2 8 Top Solder Mask Schematic Bill of Materials and Layout www ti com 8 TLV841EVM Voltage Supervisor User Guide SNVU755A JANUARY 2021 REVISED JUNE 2021 Submit Document Feedback Copyrigh...

Page 9: ...upply TP2 RESET Connection to RESET pin Allows the user to monitor the RESET output pin TP3 MR SENSE CT Connect to SENSE pin variant option 1 Connect to MR pin variant option 2 Connect to CT pin varia...

Page 10: ...capacitor to reduce the sensitivity of transient voltages on the monitored signal Connecting C2 to the SENSE input will affect the timing specs such as reset time delay tD Pin 2 CT to Pin 3 C3 For TLV...

Page 11: ...BHR See Table 4 1 for information on the default EVM threshold voltage values OPTIONAL Although not required in most cases for noisy applications the TLV841EVM contains jumper J6 Jumper J6 is meant fo...

Page 12: ...gic high due to the internal pull up resistor and RESET is de asserted to a logic high after the user defined delay expires If jumper J8 is left floating the device operates normally as the MR pin def...

Page 13: ...Delay Programming Program tD via CT TLV841C The TLV841C device variant has two options for setting the RESET time delay connect CT pin to a capacitor to GND or leave CT pin floating The reset time del...

Page 14: ...onnect CT to delay capacitor C3 This connects the CT pin to a 0 1 F capacitor to set the RESET delay tD to 61 9 ms By removing the shunt jumper from jumper J6 the RESET time delay defaults to the mini...

Page 15: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 16: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 17: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 18: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 19: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 20: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

Reviews: