Texas Instruments TLV320AIC34EVM-K User Manual Download Page 17

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4.6.1.1

Use Without PLL

4.6.1.2

Use With The PLL

4.6.1.3

Setting the ADC and DAC Sampling Rates

TLV320AIC34EVM Software

Setting up the TLV320AIC34 for clocking without using the PLL permits the lowest power consumption by
the codec. The

CLKDIV_IN

source can be selected as either

MCLK

GPIO2

, or

BCLK

, the default is

MCLK. The CLKDIV_IN frequency is then entered into the

CLKDIV_IN

box, in megahertz (MHz). The

default value shown, 11.2896MHz, is the frequency used on the USB-MODEVM board. This value is then
divided by the value of Q, which can be set from 2 to 17; the resulting

CLKDIV_OUT

frequency is shown

in the indicator next to the

control. The result frequency is shown as the

Actual Fsref

When PLLDIV_OUT is selected as the codec clock source, the PLL will be used. The PLL clock source is
chosen using the

PLLCLK_IN

control, and may be set to either

MCLK

GPIO2

, or

BCLK

. The PLLCLK_IN

frequency is then entered into the

PLLCLK_IN Source

box.

The

PLL_OUT

and

PLLDIV_OUT

indicators show the resulting PLL output frequencies with the values set

for the P, K, and R parameters of the PLL. See the

TLV320AIC34

data sheet for an explanation of these

parameters. The parameters can be set by clicking on the up/down arrows of the

, and

combo

boxes, or they can be typed into these boxes.

The values can also be calculated by the PC software. To use the PC software to find the ideal values of
P, K, and R for a given PLL input frequency and desired Fsref:

1. Verify the correct reference frequency is entered into the

PLLCLK_IN Source

box in megaHertz (MHz)

2. The desired Fsref should be set using the

Fsref

switch.

3. Push the

Search for Ideal Settings

button. The software will start searching for ideal combinations of

P, K, and R which achieve the desired Fsref. The possible settings for these parameters are displayed
in the spreadsheet-like table labeled

Possible Settings

4. Click on a row in this table to select the P, K, and R values located in that row. Notice that when this is

done, the software updates the P, K, R, PLL_OUT and PLLDIV_OUT readings, as well as the

Actual

Fsref

and Error displays. The values show the calculations based on the values that were selected.

This process does not actually load the values into the TLV320AIC34, however; it only updates the
displays in the software. If more than one row exists, the user can choose the other rows to see which
of the possible settings comes closest to the ideal settings.

When a suitable combination of P, K, and R have been chosen, pressing the

Load Settings into Device?

button will download these values into the appropriate registers on the TLV320AIC34.

The Fsref frequency that is determine either enabling or bypassing the PLL (see

Section 4.6.1.1

Section 4.6.1.2

) is used to determine the actual ADC and DAC sampling rates. Using the

NADC

and

NDAC

factors the sampling rates are derived from the Fsref. If dual rate mode is desired, this option can

be enabled for either the ADC or DAC by pressing the corresponding