Texas Instruments TLK1501, User Manual

Page: 9 / 53

2-1
TLK1501 EVM Board Configuration
TLK1501 EVM Board Configuration
The TLK1501 EVM board gives the developer various options for operation,
many of which are jumper selectable. Other options can be either soldered into
the EVM or connected through input connectors.
The TX and RX parallel connectors, J1–J4 of Figures 8 and 10 in Appendix A,
provide a connection for both transmitted and received data. The reference
clock is supplied through SMA connector J8 and jumper J5 must be installed
between pins 1 and 2. A direct clock connection can also be made to J5 pins
1 and 3. The high-speed serial data is transmitted through J13 and J14 SMA
connectors. The received recovered clock (RX_CLK) is output through J15
header. Received data connects through SMA connectors J17 and J23 on the
RX side of the board. Header J7 provides static signals (normally pulled high)
to configure the device for different modes of operation. The J20 header
indicates the optical transmitter has detected a signal and J21 allows the
operator to disable the optical transceiver.
The power planes are split three ways to provide power for different parts of
the board. This prevents coupling of switching noise between the analog and
digital sections of the TLK1501 and provides voltage isolation for the laser
section. The laser section of the board requires 3.3 volts and is energized
through the VCC connector. The VDD and VDDA connectors require 2.5 volts
and are joined together by a removable ferrite bead L3 that is installed in the
default configuration. Thus, only the VDD connection is necessary to energize
the TLK1501 device in the default configuration. In all sections of the board,
the ground planes are common and each ground plane is tied together at every
component ground connection. For a detailed schematic and layout see
TLK1501EVM Schematic, Optical Transceiver Schematic and Board Layer
Stack-up in Appendix A.
Topic Page
2.1 Typical Test and Setup Configurations 2–3 . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Optical Interfacing and Configuration 2–7 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2