Texas Instruments TIDA-010046, Design Manual

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9 NŸ
±25%
R
H
R
L
VDDIO
RX_DV
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System Overview
11 TIDUES1A – October 2019 – Revised February 2020
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EMC Compliant 10/100-Mbps Ethernet PHY Reference Design With IEEE
802.3at Type-1 ( ≤ 12.95 W) PoE-PD
is in RMII master and provides 50 MHz on pin 2. The DP83822I device should be placed in RMII slave
with a 50-MHz reference clock input on the XI pin as highlighted in
Table 2 . This can be done using pin 26
(RX_DV), which is a strap pin with 9-k Ω pulldown resistor as Figure 5 shows. Therefore, the strap function
mode-4 should be used as indicated by Table 3 . This is achieved by using 2.49 k Ω for R86 (RH) and do
not populate R91 (RL) as highlighted in Table 4 and also shown in Figure 6 .
Table 2. DP83822I MAC Interface Configuration
RGMII_EN RMIIEN XI_50 DESCRIPTION
0 0 0 MII, 25-MHz reference clock
0 0 1 Reserved
0 1 0 RMII, 25-MHz reference clock
0 1 1 RMII, 50-MHz reference clock
1 X 0 RGMII, 25-MHz reference clock
1 X 1 Reserved
Figure 5. DP83822I Bootstrap Circuit for RX_DV Pin
Table 3. Mode-4 for 50 MHz on XI and RMII Enable
PIN NAME PIN # DEFAULT
STRAP FUNCTION
MODE XI_50 RMII_EN
RX_DV 26 [00]
1 (Default 0 0
2 1 0
3 0 1
4 1 1
Table 4. Recommended 4-Level Strap Resistor Ratios for Pulldown Pin Mode-4
MODE IDEAL R
H
(k
Ω
) IDEAL R
L
(k
Ω
)
PULLDOWN PINS (9 k
Ω
)
1 (Default) OPEN OPEN
2 10 2.49
3 5.76 2.49
4 2.49 OPEN
PULLUP PINS (50 k
Ω
)
1 OPEN 1.96
2 13 1.96
3 6.2 1.96
4 (Default) OPEN OPEN