Texas Instruments TIDA-00204, Manual

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System Overview
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12 JAJU324B – March 2015 – Revised July 2017
TIDU832
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2.3.1.1.2 MAC Layer Interface
The MAC interface of this design was chosen according to minimum number of pins at lowest possible
clock frequency. See
表
6 of the pin definitions.
表 表
6. MAC Interface Option Pinout for the Different Standards
DECISION CRITERION GMII RGMII SGMII
Number of MAC interface signals 25 12 4 or 6
Clock frequency 125 MHz 125 MHz 625 MHz
With those considerations, the choice was to use the RGMII as it is running at a lower frequency than the
SGMII. Therefore, the RGMII allows for easier PCB routing of the signals, and the number of signals is
acceptable.
The RGMII signals are not differential but single-ended, and they are referenced to a clock signal of
125 MHz. It is crucial that length matching is done properly for all signals to avoid skew due to different
propagation delay between the clock and the data signals.
For this design, the following rules were followed on the RGMII signals.
表 表
7. DP83867 RGMII Design Rules on TIDA-00204 PCB
RULES DISTANCE
RGMII TX length matching 0.254 mm
RGMII RX length matching 0.254 mm
RGMII data-to-data distance separation 0.762 mm
RGMII clock-to-data distance separation 1.27 mm
RGMII clock-to-clock distance separation 1.27 mm
RGMII TX length matching 0.254 mm
RGMII RX length matching 0.254 mm
Max total trace length 63.5 mm
These rules are referenced from High-Speed Interface Layout Guidelines (SPRAAR7).
Additional considerations are to place each PHYs RGMII TX and RX on the same layer and add series
termination resistors close to the corresponding output pins. Because the DP83867IR has an integrated
50- Ω series impedance, a 0- Ω series termination has been placed at the DP83867 RGMII RX output pins.
This was a test and debug option and the termination resistor (array) can be removed in a production
design.
A 22- Ω series termination resistor was placed close to the RGMII1 and RGMII2 TX pins of the AM3359
Sitara.