background image

GND

1.8V

IRQZ

CONTROL

SDZ

I2C

SCL
SDA

VBAT

VBAT

GND

1.8V

GND

DF2SE

>>>

SDZIRQZSDOUTSCLSDAFSYNCSBCLKSDIN

><>><

GND

SDIN

SBCLK
FSYNC

SDOUT

ASI

VSENSE2-


VSENSE1-

1

2

3

J10AD0

1

2

3

J11AD1

1

2

3

J12AD0

1

2

3

J13AD1

1.8V

10.0kR6

AD0-2

AD1-2

AD0-1

AD1-1

IRQ2Z

IRQZ

CHANNEL 2

CHANNEL 1ASI

1
3
5

6

4

2

7
9

10

8

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35

38

37

40

39

J1Power/Analog

1
3
5

6

4

2

7
9

10

8

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35

38

37

40

39

J2ASI/I2C/CONTROLVSENSE2-VSENSE1-

IOVDD

VBAT

Over Voltage Protection

GND

GND

SCL

SDA

GND

0.1µFC11

GND

10.0kR3

IOVDD

IOVDD

IOVDD

A01

A12

A23

VSS4

SDA5

SCL6

WP7

VCC8

U324FC512-I/ST

GND

TP4GND

J9WP

TP5GND

TP3GND

5.6V

D1

0R7

SDZA1

SBCLKA2
FSYNCA3

SCLA4
SDAA5

DREGA6

SDOUTB1

SDINB2

AD1B3

AD0B4

IRQZB5

VDDB6

VBATC1
VBATC2

VSNS_N1C3

GREGC4

VSNS_P1_N2C5

VSNS_P2C6

BGNDD1
BGNDD2
BGNDD3

GNDD4

PGNDD5
PGNDD6

SWE1
SWE2
SWE3

GNDE4

OUT_PE5
OUT_NE6

VBSTF1
VBSTF2
VBSTF3

PVDDF4
PVDDF5
PVDDF6

TAS2564YBGU2OUT-P2OUT-N2

0R1
0R2

IRQ2Z

VSNS2_P2VSNS1OUT2-

DF2SE

VSENSE2-

OUT2+

OUT2-

OUT2-
OUT2+

0R5
0R4

0R14

0R15VS1P-VS2N2

VS-2

0R18

4

1

2

3

J14OUT2

VS-2VS-OUT2-

GND

GND

OUT2-

OUT2+

SPKR CONFIG

SHUNT3 Wire = 3-42 Wire = 2-3

1µF50VC25

1µF50VC26

1

2
3

J5OUT2

O

U

T

2

+

VS

-2

VS

-P

2

O

U

T

2

-

OUT2-

SDIN

SBCLK
FSYNC

SDOUT

SDZ

SCL
SDA

AD0-2
AD1-2

GND

GND

GND

25V0.1

µ

FC12GREG2DREG2PVDD2

25V0.01uFC8

F50VC9SW2

1µHL1

VBAT

VBAT2

0R10

Bypass Option

GND

25V0.1

µFC3

GND

GND

1

2

3

4

J3VBAT2

25V10

µFC1

25V10

µFC2

GND

J16VBAT2-SNS

Sensing Only

VDD2

GND

1.8V

GND

25V0.01uFC5

10V4.7uFC4

J4VDD2

GND

GND

GND

PVDD2

TP1PVDD2

25V1uFC7 25V10

µFC6

25V10

µFC10

GND

330pFC23

2.0R20

SDZA1

SBCLKA2
FSYNCA3

SCLA4
SDAA5

DREGA6

SDOUTB1

SDINB2

AD1B3

AD0B4

IRQZB5

VDDB6

VBATC1
VBATC2

VSNS_N1C3

GREGC4

VSNS_P1_N2C5

VSNS_P2C6

BGNDD1
BGNDD2
BGNDD3

GNDD4

PGNDD5
PGNDD6

SWE1
SWE2
SWE3

GNDE4

OUT_PE5
OUT_NE6

VBSTF1
VBSTF2
VBSTF3

PVDDF4
PVDDF5
PVDDF6

TAS2564YBGU1

IRQZ

SDIN

SBCLK
FSYNC

SDOUT

SDZ

SCL
SDA

GND

SW1

VBAT

VBAT1

Bypass Option

GND

GND

GND

GND

Sensing Only

VDD1

GND

1.8V

GND

GND

GND

GND

PVDD1

GND

GND

GND

OUT1-

OUT1+

1µF50VC27

1µF50VC28

DF2SE

OUT1-
OUT1+

VSENSE1-

0R12
0R11

OUT1+

OUT1-

OUT-P1OUT-N1

0R8
0R9

VSNS2_P1VSNS1_N1

0R16

0R17VS1P-VS2N1VS-1

0R19

4

1

2

3

J15OUT1VS-1VS-OUT1-

OUT1+OUT1-

1

2
3

J8OUT1OUT1-

SPKR CONFIG

SHUNT3 Wire = 3-42 Wire = 2-3

VS

-P

1

O

U

T

1

+

VS

-1

O

U

T

1

-

25V0.1

µ

FC24GREG1DREG1

25V0.01uFC20

1µF50VC21

GND

GND

AD0-1
AD1-1

TP2PVDD1

25V0.01uFC17

10V4.7uFC16

25V10

µFC18

25V10

µFC22

J7VDD1

25V1uFC19

PVDD1

0R13

25V0.1

µFC15

25V10

µFC13

25V10

µFC14

1

2

3

4

J6VBAT1

J17VBAT1-SNS

330pFC29

2.0R21

1µHL2

TP6GND

www.ti.com

EVM Schematics

11

SLAU812 – July 2019

Submit Documentation Feedback

Copyright © 2019, Texas Instruments Incorporated

TAS2564YBGEVM-DC User's Guide

I

2

C Clock (SCLK)

I

2

C Data (SDA) The selection between USB (internal) and external inputs is set using the control

header on PPC3-EVM-MB.
Please refer to for detailed configuration settings.

8

EVM Schematics

Figure 14. EVM Schematic

Summary of Contents for TAS2564

Page 1: ...TDM I2 C interfaces Contents 1 Export Control Notice 3 2 Description 3 3 Specifications 3 4 Software 3 5 Device Configuration 4 6 3 Wire Speaker Connection 9 7 Digital Audio Interfaces 10 8 EVM Schematics 11 9 EVM Layer Plots 12 10 Bill of Materials 15 List of Figures 1 Requesting PPC3 Access 4 2 Default Jumper Settings 4 3 Address Select 5 4 Mono Setup 5 5 Windows Playback Devices 6 6 Texas Instr...

Page 2: ...M DC Bottom Solder 13 24 TAS2564YBGEVM DC Bottom Silk Screen 13 List of Tables 1 Specifications 3 2 Default Jumper Settings 4 3 Address Select Jumpers 5 4 Bill of Materials 15 Trademarks PurePath is a trademark of Texas Instruments Microsoft Windows are trademarks of Microsoft Corporation All other trademarks are the property of their respective owners ...

Page 3: ...ol via PurePath Console 3 PPC 3 GUI USB HID USB class audio device compatible with Microsoft Windows 7 External 100 mil headers PSIA I2S TDM interface I2 C Hardware Shutdown Control Interrupt Output NOTE Please refer to PPC3 EVM MB User s Guide SLEU120 for detailed configuration details 3 Specifications Table 1 lists the supply input and output requirements for TAS2564YBG Table 1 Specifications Su...

Page 4: ...ation for the TAS2564 is described below in Table 2 and Figure 2 5 1 Default Jumper Settings Table 2 Default Jumper Settings Jumper Setting Description J11 L Ch 2 ADDR 1 J10 H Ch 2 ADDR 0 J4 Insert Ch 2 VDD J14 Pins 2 3 Output sense select J3 Insert x2 Ch 2 VBAT J9 Insert EEPROM write protect J6 Insert x2 Ch 1 VBAT J15 Pins 2 3 Output sense select J7 Insert Ch 1 VDD J12 L Ch 1 ADDR0 J13 L Ch 1 ADD...

Page 5: ...x9A H L 0x9C L H 0x9E H H Figure 3 Address Select TAS2564 supports 4 user configurable I2 C addresses shown in Section 5 2 Use J12 J13 to configure Channel 1 and J10 J11 to configure Channel 2 as shown in Figure 3 5 3 Mono Setup Use the following instructions to complete a mono setup 1 Install PPC3 with the TAS2564 plug in 2 Connect a speaker to J8 on the TAS2564YBGEVM DC 3 Remove the jumpers at J...

Page 6: ...I2S 1 8 V IOVDD 6 Connect a 5 V supply to connector J12 or J11 on PPC3 EVM MB 7 Connect a Micro USB Cable from PC to PPC3 EVM MB 8 Verify that TI USB Audio UAC2 0 is the default playback device by opening the sound dialog from the Windows Control Panel Figure 5 Windows Playback Devices 9 Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the system tray F...

Page 7: ...Rate 11 Configure the device using the TAS2564 PPC3 Plug in 5 4 Stereo Setup Use the following instructions to complete a stereo setup 1 Install PPC3 with the TAS2564 plug in 2 Connect a speaker to both J8 and J5 on the TAS2564YBGEVM DC 3 Set the jumpers at J12 J13 and J11 J10 to the unique I2 C address as shown in Section 5 2 Figure 8 Stereo Setup 4 Configure PPC3 EVM MB as described in USB contr...

Page 8: ...nect a Micro USB Cable from PC to PPC3 EVM MB 7 Verify that TI USB Audio UAC2 0 is the default playback device by opening the sound dialog from the Windows Control Panel Figure 9 Windows Playback Devices 8 Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the system tray Figure 10 Texas Instruments USB Audio Device Control Panel 9 Set the sampling rate R...

Page 9: ...onnection where an additional Voltage sense pin provides feedback for a center tap speaker coil voltage This helps detect mechanical offset of the speaker to maximize cone excursion in both directions Unless a 3 wire speaker is specifically being used to evaluate device performance it is recommended to follow the standard 2 wire configuration To enable 3 wire mode on the EVM do the following 1 Mov...

Page 10: ...ection 7 Digital Audio Interfaces Select the various digital audio interfaces on the TAS2770EVM Reference Board through hardware settings and software settings Several headers on PPC3 EVM MB allow access to the following digital audio signals I2S Data out SDOUT from the TAS2564 for example current and voltage sense data I2S Data in SDIN to the TAS2564 I2S Word clock or frame sync FSYNC I2S Bit clo...

Page 11: ...DD2 25V0 01uFC8 1µF50VC9SW2 1µHL1 VBAT VBAT2 0R10 Bypass Option GND 25V0 1 µFC3 GND GND 1 2 3 4 J3VBAT2 25V10 µFC1 25V10 µFC2 GND J16VBAT2 SNS Sensing Only VDD2 GND 1 8V GND 25V0 01uFC5 10V4 7uFC4 J4VDD2 GND GND GND PVDD2 TP1PVDD2 25V1uFC7 25V10 µFC6 25V10 µFC10 GND 330pFC23 2 0R20 SDZA1 SBCLKA2 FSYNCA3 SCLA4 SDAA5 DREGA6 SDOUTB1 SDINB2 AD1B3 AD0B4 IRQZB5 VDDB6 VBATC1 VBATC2 VSNS_N1C3 GREGC4 VSNS_...

Page 12: ...2 SLAU812 July 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TAS2564YBGEVM DC User s Guide 9 EVM Layer Plots Figure 15 TAS2564YBGEVM DC Top Silk Screen Figure 16 TAS2564YBGEVM DC Top Solder Mask ...

Page 13: ...umentation Feedback Copyright 2019 Texas Instruments Incorporated TAS2564YBGEVM DC User s Guide Figure 17 TAS2564YBGEVM DC Top Copper Figure 18 TAS2564YBGEVM DC Copper Layer 2 Figure 19 TAS2564YBGEVM DC Copper Layer 3 Figure 20 TAS2564YBGEVM DC Copper Layer 4 ...

Page 14: ...ww ti com 14 SLAU812 July 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TAS2564YBGEVM DC User s Guide Figure 21 TAS2564YBGEVM DC Copper Layer 5 Figure 22 TAS2564YBGEVM DC Bottom Copper ...

Page 15: ...escription PackageRefer ence PartNumber Manufacturer Alternate PartNumber Alternate Manufacturer PCB1 Printed Circuit Board AMPS043 Any C1 C2 C6 C10 C13 C14 C18 C22 10uF CAP CERM 10 uF 35 V 10 X7R AEC Q200 Grade 1 1206_190 1206_190 CGA5L1X7R1 V106K160AC TDK C4 C16 4 7uF CAP CERM 4 7 uF 10 V 10 X5R 0603 0603 CGB3B1X5R1 A475K055AC TDK C9 C21 1uF CAP CERM 1 µF 16 V 20 X7R 0603 0603 CL10B105MO 8NNWC S...

Page 16: ...ductor Shielded Metal Composite 1 uH 3 3 A 0 04 ohm SMD 2 5 x 1 2 x 2 mm DFE252012F 1R0M P2 MuRata Toko R1 R2 R8 R9 0 RES 0 5 0 125 W 0805 0805 RC0805JR 070RL Yageo America R3 R6 10 0k RES 10 0 k 1 0 063 W AEC Q200 Grade 0 0402 0402 RMCF0402FT 10K0 Stackpole Electronics Inc R4 R5 R11 R12 0 RES 0 5 0 063 W 0402 0402 ERJ 2GE0R00X Panasonic R7 0 RES 0 5 0 1 W 0603 0603 ERJ 3GEY0R00V Panasonic SH J1 S...

Page 17: ...05A LARGE T R DCK0005A SN74LVC1G1 25DCKR Texas Instruments C3 C15 0 1uF CAP CERM 0 1 µF 25 V 10 X7R AEC Q200 Grade 1 0402 0402 CGA2B3X7R1 E104K050BB TDK C5 C7 C8 C11 C17 C19 C20 C23 0 01uF CAP CERM 0 01 uF 25 V 10 X7R 0402 0402 GCM155R71E 103KA37D MuRata C25 C26 C27 C28 1uF CAP CERM 1 µF 16 V 20 X7R 0603 0603 CL10B105MO 8NNWC Samsung FID1 FID2 FID3 FID4 FID5 FID6 Fiducial mark There is nothing to ...

Page 18: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

Reviews: