Texas Instruments SN65LVCP114, User Manual

Page: 2 / 31

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WARNING
This equipment is intended for use in a laboratory test environment
only. It generates, uses, and can radiate radio frequency energy
and has not been tested for compliance with the limits of
computing devices, pursuant to subpart J, part 15 of FCC rules.
These rules are designed to provide reasonable protection against
radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications,
in which case the user, at their own expense, must take whatever
measures are necessary to correct this interference.
Contents
1 Introduction
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2 EVM PCB and High-Speed Design Considerations
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3 SN65LVCP114 EVM Kit Contents
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4 SN65LVCP114 EVM Board Configuration
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5 Test Setup
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6 I2C Mode
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7 GPIO Mode
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8 Schematics
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9 Bill of Materials
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10 Board Layout
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Appendix A Jumper Shunt Settings
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Appendix B Typical Evaluation Setups
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List of Figures
1 SN65LVCP114 EVM
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2 SN65LVCP114 EVM Jumper Description
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3 SN65LVCP114 EVM Schematic, Port A
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4 SN65LVCP114 EVM Schematic, Port B
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5 SN65LVCP114 EVM Schematic, Port C
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6 SN65LVCP114 EVM Schematic, Controls_1
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7 SN65LVCP114 EVM Schematic, Controls_2
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8 SN65LVCP114 EVM Schematic, Controls_3
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9 SN65LVCP114 EVM Schematic, Power Distribution
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10 SN65LVCP114 EVM Schematic, USB Interface
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11 SN65LVCP114 EVM PCB Layer Construction
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12 SN65LVCP114 Board Layout: Top Signal (Layer 1 of 6)
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13 SN65LVCP114 Board Layout: Internal Ground (Layer 2 of 6)
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14 SN65LVCP114 Board Layout: Internal Power (Layer 3 of 6)
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15 SN65LVCP114 Board Layout: Internal Signal (Layer 4 of 6)
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16 SN65LVCP114 Board Layout: Internal Ground (Layer 5 of 6)
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17 SN65LVCP114 Board Layout: Bottom Signal (Layer 6 of 6)
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18 Receive Side Use Case
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19 Transmit Side Use Case
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20 Combined Bus Extension Use Case
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List of Tables
1 SN65LVCP114 EVM Pin and Jumper Functionality
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2 SN65LVCP114 Evaluation Module (EVM) SLLU160 – December 2011
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