Texas Instruments SLVU013, User Manual

Page: 34 / 64

External Component Selection
2-14
2.2 External Component Selection
This section shows the procedure used in designing and selecting the power
stage components to meet the performance parameters shown in Table 1–2
for the example circuit shown in Figure 1–3.
2.2.1 Duty Cycle Estimate
An estimate of the duty cycle is used frequently in the following sections. The
duty cycle, D, is the ratio of the high-side power-switch conduction time to the
period of one switching cycle. The duty cycle for a continuous mode step-down
converter is given by:
D
+
V
O
)
V
DS(ON)
V
I
Where:
V
DS(ON)
= An estimate of the on-voltage of the power MOSFETs.
For an initial estimate for V
DS(ON)
, use 0.2 V. So, for an output voltage of 3.3 V
and an input voltage of 5 V, the duty cycle calculates to:
D
+
3.3 V
)
0.2 V
5 V
+
0.7
2.2.2 Input Capacitance
The input capacitance provides a low-impedance voltage source for the power
stage. The ESR, ESL, RMS current rating and capacitance value of the input
capacitance are important parameters in the selection process. The most
stringent requirement is often the RMS current that the capacitance must
handle. An equation for the RMS current seen by the input capacitance for a
buck converter is given by:
I
Cin(RMS)
+
D (1–D) I
2
O
Ǹ
The above equation assumes that the output ripple current is small, that there
is an input inductor, and that its ripple current is small. For
V
I
= 5 V and
I
O
= 6 A, we get:
I
Cin(RMS)
+
0.7 (1 –0.7) 6
2
Ǹ
+
2.7 A RMS
The input capacitance for this design uses three 150-
µ
F, 6.3-V Sanyo
POSCAP type electrolytic capacitors in parallel. They are C2, C3, and C4 in
Figure 1–3. The ripple current rating for one of these capacitors is 1.9 A RMS
at 45
°
C. The total ripple current rating for the input capacitance is
3
×
1.9 = 5.7 A RMS.
2.2.3 Output Filter Design
Unlike fixed-frequency PWM-controlled power supplies, the output filter
design is driven primarily by the need to provide satisfactory output voltage