EVM Schematic, Board Layout, and Bill of Materials (BOM)
3
SBOU222A – April 2019 – Revised February 2020
Copyright © 2019–2020, Texas Instruments Incorporated
OPA818DRGEVM Evaluation Module
3.2
EVM Layers
to
illustrate the various board layers for the OPA818DRGEVM.
Figure 2. Top Overlay
Figure 3. Top Solder
Figure 4. Top Layer
Figure 5. Ground Plane