Public Version
IVA2.2 Subsystem Register Manual
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Table 5-284. TPCC_SERH
Address Offset
0x103C
Physical address
0x01C0 103C
Instance
IVA2.2 TPCC
Description
Secondary Event Register (High Part):
The secondary event register is used along with the Event Register (ERH) to provide information on the state of an
Event.
En = 0: Event is not currently in the Event Queue.
En = 1: Event is currently stored in Event Queue. Event arbiter will not prioritize additional events.
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
E63
E62
E61
E60
E59
E58
E57
E56
E55
E54
E53
E52
E51
E50
E49
E48
E47
E46
E45
E44
E43
E42
E41
E40
E39
E38
E37
E36
E35
E34
E33
E32
Bits
Field Name
Description
Type
Reset
31
E63
Event #63
R
0
30
E62
Event #62
R
0
29
E61
Event #61
R
0
28
E60
Event #60
R
0
27
E59
Event #59
R
0
26
E58
Event #58
R
0
25
E57
Event #57
R
0
24
E56
Event #56
R
0
23
E55
Event #55
R
0
22
E54
Event #54
R
0
21
E53
Event #53
R
0
20
E52
Event #52
R
0
19
E51
Event #51
R
0
18
E50
Event #50
R
0
17
E49
Event #49
R
0
16
E48
Event #48
R
0
15
E47
Event #47
R
0
14
E46
Event #46
R
0
13
E45
Event #45
R
0
12
E44
Event #44
R
0
11
E43
Event #43
R
0
10
E42
Event #42
R
0
9
E41
Event #41
R
0
8
E40
Event #40
R
0
7
E39
Event #39
R
0
6
E38
Event #38
R
0
5
E37
Event #37
R
0
4
E36
Event #36
R
0
3
E35
Event #35
R
0
2
E34
Event #34
R
0
1
E33
Event #33
R
0
0
E32
Event #32
R
0
Table 5-285. Register Call Summary for Register TPCC_SERH
IVA2.2 Subsystem Register Manual
•
904 IVA2.2 Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated