Public Version
PRCM Register Manual
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Table 3-516. PM_PREPWSTST_NEON
Address Offset
0x0000 00E8
Physical Address
0x4830 73E8
Instance
NEON_PRM
Description
This register provides a status on the NEON domain previous power state. It indicates the state entered
during the last sleep transition.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
LASTPOWERSTATEENTERED
Bits
Field Name
Description
Type
Reset
31:2
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x00000000
1:0
LASTPOWERSTATEENTERED
Last power state entered
RW
0x0
0x0: NEON domain was previously OFF
0x1: NEON domain was previously in RETENTION
0x2: NEON domain was previously INACTIVE
0x3: NEON domain was previously ON
Table 3-517. Register Call Summary for Register PM_PREPWSTST_NEON
PRCM Basic Programming Model
•
PM_PREPWSTST_ <domain_name> (Previous Power State Status Register)
PRCM Register Manual
•
3.8.2.15 USBHOST_PRM Registers
3.8.2.15.1 USBHOST_PRM Register Summary
Table 3-518. USBHOST_PRM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
RW
32
0x0000 0058
0x4830 7458
C
RW
32
0x0000 00A0
0x4830 74A0
W
RW
32
0x0000 00A4
0x4830 74A4
W
RW
32
0x0000 00A8
0x4830 74A8
W
RW
32
0x0000 00B0
0x4830 74B0
W
RW
32
0x0000 00C8
0x4830 74C8
W
RW
32
0x0000 00E0
0x4830 74E0
W
R
32
0x0000 00E4
0x4830 74E4
C
RW
32
0x0000 00E8
0x4830 74E8
C
654 Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated