Texas Instruments OMAP36 Series, Technical Reference Manual

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prcm-090
CORE power domain
L4_ICLK L3_ICLK
U
S
B
H
O
S
T
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L
3
_
IC
L
K
U
S
B
H
O
S
T
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S
A
R
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F
C
L
K
U
S
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H
O
S
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L
4
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IC
L
K
WKUP power domain
USBHOST power domain
PRM
USBHOST subsystem
CM
OSC_SYS_CLK 48M_FCLK
U
S
B
H
O
S
T
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4
8
M
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F
C
L
K
120M_FCLK
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1
2
0
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Public Version
PRCM Functional Description
www.ti.com
Figure 3-54. USBHOST Clock Signals
The HS USB host subsystem interface is clocked with the L3 and L4 clocks (USBHOST_L3_ICLK and
USBHOST_L4_ICLK, respectively).
The HS USB host subsystem requires two functional clocks (USBHOST_120M_FCLK and
USBHOST_48M_FCLK) that may or may not be requested simultaneously. Therefore, they are gated
independently based on the configuration of the
CM_FCLKEN_USBHOST [0] EN_USBHOST1 and
CM_FCLKEN_USBHOST [1] EN_USBHOST2 bits.
The HS USB host subsystem gets an additional functional clock from the PRM (USBHOST_SAR_FCLK).
It is dedicated to the save-and-restore mechanism and is automatically gated/enabled by the PRM, based
on the HS USB host save-and-restore bit configuration (the
PM_PWSTCTRL_USBHOST [4]
SAVEANDRESTORE bit) and on the USBHOST power domain state transitions.
3.5.3.4.1.9 WKUP Power Domain
Figure 3-55 shows the clock signals and their relationships in the WKUP power domain.
318 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated