Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 3145 / 3738

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McBSP Basic Programming Model
See Section 21.4.6.7 .
21.5.1.6.2.2 Data Behavior
21.5.1.6.2.2.1 Choose 1 or 2 Phases for the Transmit Frame
McBSPi. MCBSPLP_XCR2_REG [15] XPHASE bit determines whether the transmit data frame has one
(Single phase) or two phases (Dual phase). When dual-phase is selected the number of words per phase
must be set to one.
21.5.1.6.2.2.2 Set the Transmit Word Length(s)
McBSPi. MCBSPLP_XCR1_REG [7:5] XWDLEN1 and McBSPi. MCBSPLP_XCR2_REG [7:5] XWDLEN2 bit
fields determine how many bits are in each serial word in phase 1 and in phase 2, respectively, of the
transmit data frame.
If a single–phase frame is selected, XWDLEN1 selects the length for every serial word received in the
frame.
If a dual–phase frame is selected, XWDLEN1 and XWDLEN2 must be set to select the both length. These
both bits can have values different.
21.5.1.6.2.2.3 Set the Transmit Frame Length
The transmit frame length is the number of serial words in the transmit frame.
McBSPi. MCBSPLP_XCR1_REG [14:8] XFRLEN1 and McBSPi. MCBSPLP_XCR2_REG [14:8] XFRLEN2 bit
fields determine how many serial words are in phase 1 and in phase 2, respectively, of the transmit data
frame.
If a dual–phase frame is selected (XPHASE=1), the frame length is 2 words, the length of phase 1 (one
word) plus the length of phase 2 (one word). Others values must not be used.
The 7–bit XFRLEN fields allow up to 128 words per phase. See Table 21-31 for a summary of how to
calculate the frame length. This length corresponds to the number of words or logical time slots or
channels per frame-synchronization pulse.
Program the XFRLEN fields with [W minus 1], where W represents the number of words per phase. For
the example, if you want a phase length of 128 words in phase 1, load 127 into XFRLEN1.
Table 21-31. How to Calculate the Length of the Transmit Frame
XPHASE XFRLEN1 XFRLEN2 Frame Length
0 0 ≤ XFRLEN1 ≤ 127 Don’t care (XFRLEN1) words
1 XFRLEN1= 0 XFRLEN2 = 0 2 words
21.5.1.6.2.2.4 Set the Transmit Reverse Mode
McBSPi. MCBSPLP_XCR2_REG [4:3] XREVERSE bit field determines whether reverse (LSB first) data
transfer option is chosen for McBSP reception.
For additional information about reverse mode, see Section 21.4.2.2 .
21.5.1.6.2.2.5 Set the Transmit Data Delay
McBSPi. MCBSPLP_XCR2_REG [1:0] XDATDLY bit field determines the length of the data delay for the
transmit frame.
The start of a frame is defined by the first clock cycle in which frame synchronization is found to be active.
The beginning of actual data transmission with respect to the start of the frame can be delayed if required.
This delay is called data delay.
3145 SWPU177N – December 2009 – Revised November 2010 Multi-Channel Buffered Serial Port
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