mcspi-027
SPIm.
MCSPI_CHxSTAT
[2:1]=0x3?
RX full?
READ_COUNT
= n - 2?
READ_COUNT < w?
Start the channel:
Set SPIm.MCSPI_CHxCTRL[0] EN bit to 1
CHANNEL_ENABLE = TRUE
Read
SPIm.MCSPI_CHxSTAT
Stop the channel:
Set SPIm.MCSPI_CHxCTRL[0] EN bit to 0
CHANNEL_ENABLE = FALSE
Read
SPIm.MCSPI_RXx
REA=1
Read SPIm.MCSPI_IRQSTATUS
Write SPIm.MCSPI_IRQSTATUS
to reset channel status bits
Return
No
Yes
No
Yes
Yes
No
No
Yes
Next command
LAST_TRANSFER
= TRUE
CHANNEL_ENABLE
= FALSE
Interrupt routine
Main process
LAST_TRANSFER = TRUE
Public Version
McSPI Basic Programming Model
www.ti.com
Figure 20-33. Receive-Only With Interrupt (Master Turbo)
20.6.2.5.2.2 Based on DMA Read Requests
In
, the main process shows the completion of a word reception in master turbo receive-only
mode with DMA write requests.
When the DMA handler completes w - 2 interface accesses, READ_COUNT is assigned the value w - 2.
3020
Multichannel SPI
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated