Public Version
SDMA Functional Description
www.ti.com
Table 11-11. Type 2 With Source or Destination Address Update
3
3
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
9
8
7
6
5
4
3
2
1
0
1
0
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
Ptr+
Src_Frame_index/Src_Packet_size
0x18
Ptr+
Dst_Frame_index/Dst_Packet_size
0x14
Ptr+
Src_Element_index
Dst_Element_index
0x10
Ptr+
CICR (interrupt events Mask)
CFN Frame Number
0xC
Ptr+
Source_Start_Address or Destination_Start_Address
0x8
Ptr+
N_type
B
Dv
Sv
Element_number
0x4
Ptr
Next_descriptor_address_pointer
R
P
sv
11.4.19.3.3 Type 3
A type 3 descriptor is limited to a few logical channel transfer address registers and transfer format
registers to be loaded. This descriptor enables simple 1D addressing link transfer (for example,
scatter-gather or ping-pong memory movement using a linked list).
shows a type 3 descriptor
with source and destination address updates.
shows a type 3 descriptor with one source or
address destination update.
Table 11-12. Type 3 With Source and Destination Address Updates
3
3
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
9
8
7
6
5
4
3
2
1
0
1
0
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
Ptr+
Destination_Start_Address
0xC
Ptr+
Source_Start_Address
0x8
Ptr+
N_type
B
Dv
Sv
Element_number
0x4
Ptr
Next_descriptor_address_pointer
R
P
sv
Table 11-13. Type 3 With Source or Destination Address Update
3
3
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
9
8
7
6
5
4
3
2
1
0
1
0
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
Ptr+
Source_Start_Address or Destination_Start_Address
0x8
Ptr+
N_type
B
Dv
Sv
Element_number
0x4
Ptr
Next_descriptor_address_pointer
R
P
sv
11.4.19.4 Linked-List Control and Monitoring
11.4.19.4.1 Transfer Mode Setting
Four descriptor types are available in
[9:8] TRANSFER_MODE to distinguish the different
transfer modes:
•
[9:8] TRANSFER_MODE = 00: The current channel is using normal mode.
•
[9:8] TRANSFER_MODE = 01: The current channel is using link-list channel mode for a
type 1, 2, or 3 descriptor.
The reset value is Normal mode (
[9:8] TRANSFER_MODE = 0).
2364
SDMA
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated