Texas Instruments OMAP36 Series, Technical Reference Manual

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L4 Interconnects
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Bits Field Name Description Type Reset
31:24 Reserved Read returns 0. R 0x00
23:9 Reserved Read returns 0. R 0x0001
8 REQ_TIMEOUT 0x0: No request timeout R 1toCLR 0
0x1: A request timeout has occurred
7:0 Reserved Read returns 0. R 0x00
Table 9-192. Register Call Summary for Register L4_TA_AGENT_STATUS_L
L4 Interconnects
• Error Logging : [0] [1]
• TA Software Reset : [2]
• Operational Modes Configuration : [3] [4]
• L4 Target Agent (L4 TA) : [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28]
[29] [30]
Table 9-193. L4_TA_AGENT_STATUS_H
Address Offset 0x02C
Physical Address See Table 9-153 to Table 9-178
Description Error reporting
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Bits Field Name Description Type Reset
31:0 Reserved Read returns 0 R 0x0000 000
Table 9-194. Register Call Summary for Register L4_TA_AGENT_STATUS_H
L4 Interconnects
• L4 Target Agent (L4 TA) : [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24]
[25]
9.3.5.3 L4 Link Register Agent (LA)
This section provides information on the L4-Core link agent (LA) register module. Each of the registers
within the module instance is described seperatly in
Table 9-195 .
The LA register blockcontains the initiator subsystem information register and the composite sideband
signal mask and status registers.
Table 9-195. L4 LA Register Summary
Register Name Type Register CORE_LA PER_LA EMU_LA WKUP_LA
Width Physical Physical Physical Physical
(Bits) Address Address Address Address
L4_LA_COMPONENT_L R 32 0x4804 1000 4900 1000 0x5400 7000 0x4832 9000
L4_LA_COMPONENT_H R 32 0x4804 1004 0x4900 1004 0x5400 7004 0x4832 9004
L4_LA_NETWORK_L R 32 0x4804 1010 0x4900 1010 0x5400 7010 0x4832 9010
L4_LA_NETWORK_H R 32 0x4804 1014 0x4900 1014 0x5400 7014 0x4832 9014
L4_LA_INITIATOR_INFO_L R 32 0x4804 1018 0x4900 1018 0x5400 7018 0x4832 9018
L4_LA_INITIATOR_INFO_H R 32 0x4804 101C 0x4900 101C 0x5400 701C 0x4832 901C
L4_LA_NETWORK_CONTROL_L RW 32 0x4804 1020 0x4900 1020 0x5400 7020 0x4832 9020
L4_LA_NETWORK_CONTROL_H RW 32 0x4804 1024 0x4900 1024 0x5400 7024 0x4832 9024
2096Interconnect SWPU177N – December 2009 – Revised November 2010
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