4
3
3
1
1
2
2
2
4
4
1
3
1 = DSI_CLK_CTRL[31:30] PLL_PWR_CMD = 0x0 (STATE_OFF)
2 = DSI_CLK_CTRL
PLL_PWR_CMD = 0x1 (STATE_ON_HSCLK)
[31:30]
3 = DSI_CLK_CTRL
PLL_PWR_CMD = 0x2 (STATE_ON_ALL)
[31:30]
4 = DSI_CLK_CTRL
PLL_PWR_CMD = 0x3 (STATE_ON_DIV)
[31:30]
ON DIV
OFF
ON ALL
ON HSCLK
RESET
dss-170
Public Version
www.ti.com
Display Subsystem Functional Description
7.4.3.6.2.1 DSI-PLL Power FSM
shows the DSI PLL power FSM.
Figure 7-94. DSI PLL Power FSM
The commands PLLPwrCmdOff, PLLPwrCmdOnAll, PLLPwrCmdOnDIV and PLLPwrCmdOnHSClk
controls the state transition of the DSI PLL control module. Software users must set the
DSS.
[31:30] PLL_PWR_CMD bit field to ask for a state change. The
[29:28] PLL_PWR_STATUS bit field gives a status on the current state of the DSI
PLL controller.
NOTE:
In a command requests to change to a state which is the current one (acknowledge has
been received), the command is ignored (nothing is sent to the DSI PLL Control module).
All the DSI PLL power is controlled by the DSI protocol engine except the LDO power of the PLL and
HSDIVIDER that can be controlled by the DSI PLL controller module. Indeed, the HSDIVIDER and PLL
SYSRESET signals can be forced by the DSI PLL controller module by setting
DSS.
[4] DSI_HSDIV_SYSRESET and DSS.
[3]
DSI_PLL_SYSRESET bits, respectively. By setting these bits to 1, the SYSRESET signal is forced active
(module is forced to reset state). When these bits are set to 0 (reset value), the SYSRESET signals are
controlled by the DSI PLL power FSM.
7.4.3.6.2.1.1 DSI-PLL HS Clock Signals
The DSIStopClk signal is provided to the DSI PLL control module. It indicates when the DSI Protocol
engine does not need to use the high-speed transfer mode (HS mode) and PLL HS output (HS_CLK
clock) can be stopped. The following conditions must also be met when DISPC_UPDATE_SYNC may be
generated by the display controller, as that may also result in the PLL HS output being stopped.
1673
SWPU177N – December 2009 – Revised November 2010
Display Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated
